[PATCHv7 9/9] gdb/gdbserver: share x86/linux tdesc caching
Willgerodt, Felix
felix.willgerodt@intel.com
Fri May 17 12:00:28 GMT 2024
> diff --git a/gdb/arch/amd64-linux-tdesc.c b/gdb/arch/amd64-linux-tdesc.c
> new file mode 100644
> index 00000000000..794cd5c815d
> --- /dev/null
> +++ b/gdb/arch/amd64-linux-tdesc.c
> @@ -0,0 +1,61 @@
> +/* Target description related code for GNU/Linux x86-64.
> +
> + Copyright (C) 2024 Free Software Foundation, Inc.
> +
> + This file is part of GDB.
> +
> + This program is free software; you can redistribute it and/or modify
> + it under the terms of the GNU General Public License as published by
> + the Free Software Foundation; either version 3 of the License, or
> + (at your option) any later version.
> +
> + This program is distributed in the hope that it will be useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + GNU General Public License for more details.
> +
> + You should have received a copy of the GNU General Public License
> + along with this program. If not, see <http://www.gnu.org/licenses/>. */
> +
> +#include "arch/x86-linux-tdesc.h"
> +#include "arch/amd64-linux-tdesc.h"
> +#include "arch/amd64.h"
> +#include "arch/x86-linux-tdesc-features.h"
> +
> +
> +/* See arch/amd64-linux-tdesc.h. */
> +
> +const struct target_desc *
> +amd64_linux_read_description (uint64_t xcr0, bool is_x32)
> +{
> + /* The type used for the amd64 and x32 target description caches. */
> + using tdesc_cache_type = std::unordered_map<uint64_t, const
> target_desc_up>;
> +
> + /* Caches for the previously seen amd64 and x32 target descriptions,
> + indexed by the xcr0 value that created the target description. These
> + need to be static within this function to ensure they are initialised
> + before first use. */
> + static tdesc_cache_type amd64_tdesc_cache, x32_tdesc_cache;
> +
> + tdesc_cache_type &tdesc_cache = is_x32 ? x32_tdesc_cache :
> amd64_tdesc_cache;
> +
> + xcr0 &= is_x32
> + ? x86_linux_x32_xcr0_feature_mask ()
> + : x86_linux_amd64_xcr0_feature_mask ();
I would love to see a short reminder comment about why we need to call
these mask() functions and can't use xcr0 directly. Same for the i386 file.
The comment in the map doesn't explicitly say why. And the comment for
the mask function doesn't either.
> diff --git a/gdb/arch/x86-linux-tdesc-features.c b/gdb/arch/x86-linux-tdesc-
> features.c
> new file mode 100644
> index 00000000000..55444d91bd5
> --- /dev/null
> +++ b/gdb/arch/x86-linux-tdesc-features.c
> @@ -0,0 +1,267 @@
> +/* Target description related code for GNU/Linux x86 (i386 and x86-64).
> +
> + Copyright (C) 2024 Free Software Foundation, Inc.
> +
> + This file is part of GDB.
> +
> + This program is free software; you can redistribute it and/or modify
> + it under the terms of the GNU General Public License as published by
> + the Free Software Foundation; either version 3 of the License, or
> + (at your option) any later version.
> +
> + This program is distributed in the hope that it will be useful,
> + but WITHOUT ANY WARRANTY; without even the implied warranty of
> + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + GNU General Public License for more details.
> +
> + You should have received a copy of the GNU General Public License
> + along with this program. If not, see <http://www.gnu.org/licenses/>. */
> +
> +#include "arch/x86-linux-tdesc-features.h"
> +
> +/* A structure used to describe a single xstate feature bit that might, or
> + might not, be checked for when creating a target description for one of
> + i386, amd64, or x32.
> +
> + The different CPU/ABI types check for different xstate features when
> + creating a target description.
> +
> + We want to cache target descriptions, and this is currently done in
> + three separate caches, one each for i386, amd64, and x32. Additionally,
> + the caching we're discussing here is Linux only, and for Linux, the only
> + thing that has an impact on target description creation is the xcr0
> + value.
> +
> + In order to ensure the cache functions correctly we need to filter out
> + only those xcr0 feature bits that are relevant, we can then cache target
> + descriptions based on the relevant feature bits. Two xcr0 values might
> + be different, but have the same relevant feature bits. In this case we
> + would expect the two xcr0 values to map to the same cache entry. */
> +
> +struct x86_xstate_feature {
> + /* The xstate feature mask. This is a mask against an xcr0 value. */
> + uint64_t feature;
> +
> + /* Is this feature checked when creating an i386 target description. */
> + bool is_i386;
> +
> + /* Is this feature checked when creating an amd64 target description. */
> + bool is_amd64;
> +
> + /* Is this feature checked when creating an x32 target description. */
> + bool is_x32;
> +};
> +
> +/* A constant table that describes all of the xstate features that are
> + checked when building a target description for i386, amd64, or x32.
> +
> + If in the future, due to simplifications or refactoring, this table ever
> + ends up with 'true' for every xcr0 feature on every target type, then this
> + is an indication that this table should probably be removed, and that the
> + rest of the code in this file can be simplified. */
> +
> +static constexpr x86_xstate_feature x86_linux_all_xstate_features[] = {
> + /* Feature, i386, amd64, x32. */
> + { X86_XSTATE_PKRU, true, true, true },
> + { X86_XSTATE_AVX512, true, true, true },
> + { X86_XSTATE_AVX, true, true, true },
> + { X86_XSTATE_MPX, true, true, false },
> + { X86_XSTATE_SSE, true, false, false },
> + { X86_XSTATE_X87, true, false, false }
> +};
> +
> +/* Return a compile time constant which is a mask of all the xstate features
> + that are checked for when building an i386 target description. */
> +
> +static constexpr uint64_t
> +x86_linux_i386_xcr0_feature_mask_1 ()
> +{
> + uint64_t mask = 0;
> +
> + for (const auto &entry : x86_linux_all_xstate_features)
> + if (entry.is_i386)
> + mask |= entry.feature;
> +
> + return mask;
> +}
> +
> +/* Return a compile time constant which is a mask of all the xstate features
> + that are checked for when building an amd64 target description. */
> +
> +static constexpr uint64_t
> +x86_linux_amd64_xcr0_feature_mask_1 ()
> +{
> + uint64_t mask = 0;
> +
> + for (const auto &entry : x86_linux_all_xstate_features)
> + if (entry.is_amd64)
> + mask |= entry.feature;
> +
> + return mask;
> +}
> +
> +/* Return a compile time constant which is a mask of all the xstate features
> + that are checked for when building an x32 target description. */
> +
> +static constexpr uint64_t
> +x86_linux_x32_xcr0_feature_mask_1 ()
> +{
> + uint64_t mask = 0;
> +
> + for (const auto &entry : x86_linux_all_xstate_features)
> + if (entry.is_x32)
> + mask |= entry.feature;
> +
> + return mask;
> +}
> +
> +/* See arch/x86-linux-tdesc-features.h. */
> +
> +uint64_t
> +x86_linux_amd64_xcr0_feature_mask ()
> +{
> + return x86_linux_amd64_xcr0_feature_mask_1 ();
> +}
> +
> +/* See arch/x86-linux-tdesc-features.h. */
> +
> +uint64_t
> +x86_linux_x32_xcr0_feature_mask ()
> +{
> + return x86_linux_x32_xcr0_feature_mask_1 ();
> +}
> +
> +/* See arch/x86-linux-tdesc-features.h. */
> +
> +uint64_t
> +x86_linux_i386_xcr0_feature_mask ()
> +{
> + return x86_linux_i386_xcr0_feature_mask_1 ();
> +}
Can we have these in the same order as the *_1 functions?
Maybe this already was an issue 1 commit earlier, I didn't re-check.
If my minor comments are addressed this looks good to me now.
Also thanks to your explanations.
After reading over the riscv code you mentioned, my main concern
with this series is gone. I think we can just extend x86 the same
way in future patches.
Thanks,
Felix
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