[PATCH] gdb/riscv: add virtualization modes display

[Yanfeng Liu]

As per RiscV debug specification 1.0.0-rc4, the virtualization bit
is carried by bit(2) of the `priv` register for debugger access.
This adds two additional modes so that to avoid displaying them as
INVALID.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
---
 gdb/riscv-tdep.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index 932708ca4e9..8511eb577f6 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -1308,14 +1308,16 @@ riscv_print_one_register_info (struct gdbarch *gdbarch,
 	      d = value_as_long (val);
 	      priv = d & 0xff;
 
-	      if (priv < 4)
+	      if (priv < 6)
 		{
 		  static const char * const sprv[] =
 		    {
 		      "User/Application",
 		      "Supervisor",
 		      "Hypervisor",
-		      "Machine"
+		      "Machine",
+		      "Virtual User",
+		      "Virtual Supervisor"
 		    };
 		  gdb_printf (file, "\tprv:%d [%s]",
 			      priv, sprv[priv]);
-- 
2.34.1