[PATCH 0/4] v2 gdb/arm: Fixes for Cortex-M stack unwinding

Torbjörn SVENSSON torbjorn.svensson@foss.st.com
Fri Nov 18 15:52:49 GMT 2022


This patchset attempts to attack the issue reported in pr/29738.

Based on my testing on a STM32L552 with TrustZone, it appears to work as
expected, but I'd love to have another set of eyes on this!

Most of the items reported can be seen using the GTZC example from ST:

I've manually verfied the register content by setting break points in
* main
* Error_Handler
* SecureFault_Handler

For the dwarf2 problem in pr/29738, I added 7-chained functions like
below and placed a breakpoint at myfunc7:

  void myfunc7()
  void myfunc1()

For each breakpoint, I then used the below macros to print the
registers. For each of the printed frames, I then manually checked if
the values maked sense.

define show_reg
  shell printf "%-8s " '$arg0'
  p/x $arg0
define show_stacks
  shell echo
  shell echo -e "\x1b[35mContent at $arg0\x1b[0m"
  set $i = 0
  while $i <= $arg1
    f $i
    show_reg $lr
    show_reg $pc
    show_reg $sp
    show_reg $msp
    show_reg $msp_s
    show_reg $msp_ns
    show_reg $psp
    show_reg $psp_s
    show_reg $psp_ns

    shell echo
    set $i = $i + 1
  shell echo
  shell echo

The show_stacks macro takes 2 arguments, a description and the number of
frames to print registers for.
To show the registers for all the frames when at the Error_Handler
breakpoint, I used:
show_stacks "Error_Handler" 7

After talkning to Luis about the v1 series of these patches, we
concluded that a generic way to store the data needed by the
prev_register function was better than trying to squeze the logic
into the _init function.

Kind regards,

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