[PATCH 3/3] gdb/arm: Track msp and psp

[Luis Machado]

On 5/16/22 15:00, Yvan Roux via Gdb-patches wrote:
> For Arm Cortex-M33 with security extensions, there are 4 different
> stacks pointers (msp_s, msp_ns, psp_s, psp_ns).  To be compatible

stacks -> stack

> with earlier Cortex-M derivates, the msp and psp register are

register -> registers

> aliases for one of the 4 real stack pointer registers.
> 
> These are the combinations that exist:
> sp -> msp -> msp_s
> sp -> msp -> msp_ns
> sp -> psp -> psp_s
> sp -> psp -> psp_ns
> 
> This means that when the GDB client is to show the value of "msp",
> the value should always be equal to either "msp_s" or "msp_ns".
> Same goes for "psp".
> 

As a general comment, we should include, in the commit message, the bug ticket link related to this problem:

Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=29121

> Signed-off-by: Torbj�rn SVENSSON <torbjorn.svensson@st.com>
> Signed-off-by: Yvan Roux <yvan.roux@foss.st.com>
> ---
>   gdb/arm-tdep.c | 18 ++++++++++++++++++
>   1 file changed, 18 insertions(+)
> 
> diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
> index 4aa277f5bc8..b9c35bcdae6 100644
> --- a/gdb/arm-tdep.c
> +++ b/gdb/arm-tdep.c
> @@ -288,6 +288,8 @@ struct arm_prologue_cache
>   
>     /* Active stack pointer.  */
>     int active_sp_regnum;
> +  int active_msp_regnum;
> +  int active_psp_regnum;

Is it possible to have 3 active SP registers at the same time? Are msp and psp really needed here or are we just not doing a good
job of figuring out what SP maps to? (msp_s, msp_ns, psp_s, psp_ns)

>   
>     /* The frame base for this frame is just prev_sp - frame size.
>        FRAMESIZE is the distance from the frame pointer to the
> @@ -345,11 +347,23 @@ arm_cache_init (struct arm_prologue_cache *cache, struct frame_info *frame)
>   
>     if (tdep->have_sec_ext)
>       {
> +      CORE_ADDR msp_val = get_frame_register_unsigned (frame, tdep->m_profile_msp_regnum);
> +      CORE_ADDR psp_val = get_frame_register_unsigned (frame, tdep->m_profile_psp_regnum);
> +
>         arm_cache_init_sp (tdep->m_profile_msp_s_regnum, &cache->msp_s, cache, frame);
>         arm_cache_init_sp (tdep->m_profile_psp_s_regnum, &cache->psp_s, cache, frame);
>         arm_cache_init_sp (tdep->m_profile_msp_ns_regnum, &cache->msp_ns, cache, frame);
>         arm_cache_init_sp (tdep->m_profile_psp_ns_regnum, &cache->psp_ns, cache, frame);
>   
> +      if (msp_val == cache->msp_s)
> +        cache->active_msp_regnum = tdep->m_profile_msp_s_regnum;
> +      else if (msp_val == cache->msp_ns)
> +        cache->active_msp_regnum = tdep->m_profile_msp_ns_regnum;
> +      if (psp_val == cache->psp_s)
> +        cache->active_psp_regnum = tdep->m_profile_psp_s_regnum;
> +      else if (psp_val == cache->psp_ns)
> +        cache->active_psp_regnum = tdep->m_profile_psp_ns_regnum;
> +
>         /* Use MSP_S as default stack pointer.  */
>         if (cache->active_sp_regnum == ARM_SP_REGNUM)
>   	  cache->active_sp_regnum = tdep->m_profile_msp_s_regnum;
> @@ -384,6 +398,10 @@ arm_cache_get_sp_register (struct arm_prologue_cache *cache,
>   	return cache->psp_s;
>         if (regnum == tdep->m_profile_psp_ns_regnum)
>   	return cache->psp_ns;
> +      if (regnum == tdep->m_profile_msp_regnum)
> +	return arm_cache_get_sp_register (cache, tdep, cache->active_msp_regnum);
> +      if (regnum == tdep->m_profile_psp_regnum)
> +	return arm_cache_get_sp_register (cache, tdep, cache->active_psp_regnum);
>       }
>     else if (tdep->is_m)
>       {