[PATCH] [AArch64] Fix testcase compilation failure
Luis Machado
luis.machado@arm.com
Tue Jul 5 14:49:31 GMT 2022
Oops... This actually fixes a testcase that I'm re-working for the MTE corefile submission (aarch64-mte-gcore.c),
which is local to my tree.
I'll incorporate that hunk to the upcoming v5 iteration of the MTE corefile patch.
The remaining hunk (fixing aarch64-mte.c) is what should be pushed.
On 7/5/22 14:37, Luis Machado via Gdb-patches wrote:
> Newer distros carry newer headers that contain MTE definitions. Account
> for that fact in the MTE testcases and define constants conditionally to
> prevent compilation failures.
> ---
> gdb/testsuite/gdb.arch/aarch64-mte-gcore.c | 9 ++++++++-
> gdb/testsuite/gdb.arch/aarch64-mte.c | 11 ++++++++++-
> 2 files changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/gdb/testsuite/gdb.arch/aarch64-mte-gcore.c b/gdb/testsuite/gdb.arch/aarch64-mte-gcore.c
> index 6840acac33a..d19b5217e16 100644
> --- a/gdb/testsuite/gdb.arch/aarch64-mte-gcore.c
> +++ b/gdb/testsuite/gdb.arch/aarch64-mte-gcore.c
> @@ -39,14 +39,21 @@
> #define PROT_MTE 0x20
> #endif
>
> -/* From include/uapi/linux/prctl.h */
> #ifndef PR_SET_TAGGED_ADDR_CTRL
> #define PR_SET_TAGGED_ADDR_CTRL 55
> #define PR_GET_TAGGED_ADDR_CTRL 56
> #define PR_TAGGED_ADDR_ENABLE (1UL << 0)
> +#endif
> +
> +/* From include/uapi/linux/prctl.h */
> +#ifndef PR_MTE_TCF_SHIFT
> #define PR_MTE_TCF_SHIFT 1
> +#define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT)
> #define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT)
> +#define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT)
> +#define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT)
> #define PR_MTE_TAG_SHIFT 3
> +#define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
> #endif
>
> void
> diff --git a/gdb/testsuite/gdb.arch/aarch64-mte.c b/gdb/testsuite/gdb.arch/aarch64-mte.c
> index bd7f1a6cf53..14057253035 100644
> --- a/gdb/testsuite/gdb.arch/aarch64-mte.c
> +++ b/gdb/testsuite/gdb.arch/aarch64-mte.c
> @@ -30,15 +30,23 @@
> #include <sys/prctl.h>
>
> /* From arch/arm64/include/uapi/asm/hwcap.h */
> +#ifndef HWCAP2_MTE
> #define HWCAP2_MTE (1 << 18)
> +#endif
>
> /* From arch/arm64/include/uapi/asm/mman.h */
> +#ifndef PROT_MTE
> #define PROT_MTE 0x20
> +#endif
>
> -/* From include/uapi/linux/prctl.h */
> +#ifndef PR_SET_TAGGED_ADDR_CTRL
> #define PR_SET_TAGGED_ADDR_CTRL 55
> #define PR_GET_TAGGED_ADDR_CTRL 56
> #define PR_TAGGED_ADDR_ENABLE (1UL << 0)
> +#endif
> +
> +/* From include/uapi/linux/prctl.h */
> +#ifndef PR_MTE_TCF_SHIFT
> #define PR_MTE_TCF_SHIFT 1
> #define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT)
> #define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT)
> @@ -46,6 +54,7 @@
> #define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT)
> #define PR_MTE_TAG_SHIFT 3
> #define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
> +#endif
>
> void
> access_memory (unsigned char *tagged_ptr, unsigned char *untagged_ptr)
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