[PATCH v2 0/5] Add support for MIPS32/64 revision 6
Faraz Shahbazker
fshahbazker@wavecomp.com
Mon May 24 17:57:57 GMT 2021
Changes from v1: style and indentation fixes from previous review.
This series adds support to GDB and simulator for MIPSR6. We introduce
partial support for IEEE 754-2008 in the common code including NaN
semantics for MIN/MAX/ABS/NEG operations and a CLASSIFY operation.
This can enabled by invoking sim_fpu_set_mode().
The multi-simulator model supports R6 in addition to previous
revisions and the engine picks the appropriate revision based on flags
in the ELF header where possible.
Faraz Shahbazker (5):
sim: Allow toggling of quiet NaN-bit semantics
sim: Factor out NaN handling in floating point operations
sim: Add partial support for IEEE 754-2008
sim: mips: Add simulator support for mips32r6/mips64r6
gdb: mips: Add MIPSR6 support
gdb/mips-tdep.c | 518 +++++++++++-
sim/common/sim-bits.h | 5 +
sim/common/sim-fpu.c | 344 ++++----
sim/common/sim-fpu.h | 17 +-
sim/mips/Makefile.in | 1 +
sim/mips/configure | 21 +-
sim/mips/configure.ac | 15 +-
sim/mips/cp1.c | 409 +++++++++-
sim/mips/cp1.h | 6 +
sim/mips/interp.c | 6 +-
sim/mips/micromips.igen | 4 +-
sim/mips/mips.igen | 378 ++++++++-
sim/mips/mips3264r2.igen | 30 +
sim/mips/mips3264r6.igen | 1226 ++++++++++++++++++++++++++++
sim/mips/sim-main.h | 97 ++-
sim/testsuite/mips/basic.exp | 66 +-
sim/testsuite/mips/hilo-hazard-3.s | 2 +-
sim/testsuite/mips/r2-fpu.s | 31 +
sim/testsuite/mips/r6-64.s | 157 ++++
sim/testsuite/mips/r6-branch.s | 290 +++++++
sim/testsuite/mips/r6-forbidden.s | 51 ++
sim/testsuite/mips/r6-fpu.s | 446 ++++++++++
sim/testsuite/mips/r6-llsc-dp.s | 57 ++
sim/testsuite/mips/r6-llsc-wp.s | 41 +
sim/testsuite/mips/r6-removed.csv | 68 ++
sim/testsuite/mips/r6-removed.s | 18 +
sim/testsuite/mips/r6.s | 163 ++++
sim/testsuite/mips/testutils.inc | 55 ++
sim/testsuite/mips/utils-r6.inc | 150 ++++
29 files changed, 4402 insertions(+), 270 deletions(-)
create mode 100644 sim/mips/mips3264r6.igen
create mode 100644 sim/testsuite/mips/r2-fpu.s
create mode 100644 sim/testsuite/mips/r6-64.s
create mode 100644 sim/testsuite/mips/r6-branch.s
create mode 100644 sim/testsuite/mips/r6-forbidden.s
create mode 100644 sim/testsuite/mips/r6-fpu.s
create mode 100644 sim/testsuite/mips/r6-llsc-dp.s
create mode 100644 sim/testsuite/mips/r6-llsc-wp.s
create mode 100644 sim/testsuite/mips/r6-removed.csv
create mode 100644 sim/testsuite/mips/r6-removed.s
create mode 100644 sim/testsuite/mips/r6.s
create mode 100644 sim/testsuite/mips/utils-r6.inc
--
2.25.1
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