[Binutils][GDB][PATCH v2] aarch64: Add support for bfloat16 in gdb.
Srinath Parvathaneni
srinath.parvathaneni@arm.com
Tue Jan 12 11:41:43 GMT 2021
This patch fixes all the comments mentioned in
https://gcc.gnu.org/pipermail/gdb-patches/2021-January/174741.html
Hi,
This patch adds support for bfloat16 in AArch64 gdb.
Also adds the field "bf" to vector registers h0-h31.
Also adds the vector "bf" to h field in vector registers v0-v31.
The following is how the vector register h and v looks like.
Before this patch:
(gdb) p $h0
$1 = {f = 0, u = 0, s = 0}
(gdb) p/x $h0
$2 = {f = 0x0, u = 0x0, s = 0x0}
(gdb) p $v0.h
$3 = {f = {0, 0, 0, 0, 0, 0, 0, 0}, u = {0, 0, 0, 0, 0, 0, 0, 0}, s = {0, 0, 0, 0, 0, 0, 0, 0}}
(gdb) p/x $v0.h
$4 = {f = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, u = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
s = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}
After this patch:
(gdb) p $h0
$1 = {bf = 0, f = 0, u = 0, s = 0}
(gdb) p/x $h0
$2 = {bf = 0x0, f = 0x0, u = 0x0, s = 0x0}
(gdb) p $v0.h
$3 = {bf = {0, 0, 0, 0, 0, 0, 0, 0}, f = {0, 0, 0, 0, 0, 0, 0, 0}, u = {0, 0, 0, 0, 0, 0, 0, 0},
s = {0, 0, 0, 0, 0, 0, 0, 0}}
(gdb) p/x $v0.h
$4 = {bf = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, f = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0},
u = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}, s = {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}
Regression testing for aarch64-none-linux-gnu target and found no regressions.
Ok for binutils-master?
Regards,
Srinath.
gdb/ChangeLog:
2021-01-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* gdb/aarch64-tdep.c (aarch64_vnh_type): Add "bf" field in h registers.
(aarch64_vnv_type): Add "bf" type in h field of v registers.
* gdb/features/aarch64-fpu.c (create_feature_aarch64_fpu): Regenerated.
* gdb/features/aarch64-fpu.xml: Add bfloat16 type.
gdb/testsuite/ChangeLog:
2021-01-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* gdb/testsuite/gdb.arch/aarch64-fp.exp: Modify to test bfloat16
support.
############### Attachment also inlined for ease of reply ###############
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 77e6ad700fcdcd5f709aecb537584184dc06d059..b5470f09aa56f27612f15a32927ea911aff970d1 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -2054,6 +2054,9 @@ aarch64_vnh_type (struct gdbarch *gdbarch)
t = arch_composite_type (gdbarch, "__gdb_builtin_type_vnh",
TYPE_CODE_UNION);
+ elem = builtin_type (gdbarch)->builtin_bfloat16;
+ append_composite_type_field (t, "bf", elem);
+
elem = builtin_type (gdbarch)->builtin_half;
append_composite_type_field (t, "f", elem);
@@ -2135,6 +2138,8 @@ aarch64_vnv_type (struct gdbarch *gdbarch)
sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vnh",
TYPE_CODE_UNION);
+ append_composite_type_field (sub, "bf",
+ init_vector_type (bt->builtin_bfloat16, 8));
append_composite_type_field (sub, "f",
init_vector_type (bt->builtin_half, 8));
append_composite_type_field (sub, "u",
diff --git a/gdb/features/aarch64-fpu.c b/gdb/features/aarch64-fpu.c
index 5b636a5f4d20c4e9092d0f4b6762b69e0aa0cfce..a80b7d4c1b8676571325ff9cb19723928a051338 100644
--- a/gdb/features/aarch64-fpu.c
+++ b/gdb/features/aarch64-fpu.c
@@ -37,6 +37,9 @@ create_feature_aarch64_fpu (struct target_desc *result, long regnum)
element_type = tdesc_named_type (feature, "int16");
tdesc_create_vector (feature, "v8i", element_type, 8);
+ element_type = tdesc_named_type (feature, "bfloat16");
+ tdesc_create_vector (feature, "v8bf16", element_type, 8);
+
element_type = tdesc_named_type (feature, "uint8");
tdesc_create_vector (feature, "v16u", element_type, 16);
@@ -68,6 +71,8 @@ create_feature_aarch64_fpu (struct target_desc *result, long regnum)
tdesc_add_field (type_with_fields, "s", field_type);
type_with_fields = tdesc_create_union (feature, "vnh");
+ field_type = tdesc_named_type (feature, "v8bf16");
+ tdesc_add_field (type_with_fields, "bf", field_type);
field_type = tdesc_named_type (feature, "v8f");
tdesc_add_field (type_with_fields, "f", field_type);
field_type = tdesc_named_type (feature, "v8u");
diff --git a/gdb/features/aarch64-fpu.xml b/gdb/features/aarch64-fpu.xml
index 14b313737341381011f68810fdd43d854ac8e96e..2235d072a094065cf7406176e11964d0725dcf91 100644
--- a/gdb/features/aarch64-fpu.xml
+++ b/gdb/features/aarch64-fpu.xml
@@ -17,6 +17,7 @@
<vector id="v8f" type="ieee_half" count="8"/>
<vector id="v8u" type="uint16" count="8"/>
<vector id="v8i" type="int16" count="8"/>
+ <vector id="v8bf16" type="bfloat16" count="8"/>
<vector id="v16u" type="uint8" count="16"/>
<vector id="v16i" type="int8" count="16"/>
<vector id="v1u" type="uint128" count="1"/>
@@ -32,6 +33,7 @@
<field name="s" type="v4i"/>
</union>
<union id="vnh">
+ <field name="bf" type="v8bf16"/>
<field name="f" type="v8f"/>
<field name="u" type="v8u"/>
<field name="s" type="v8i"/>
diff --git a/gdb/testsuite/gdb.arch/aarch64-fp.exp b/gdb/testsuite/gdb.arch/aarch64-fp.exp
index 8d06a3f5201372856f8402d0269c8215cbd0a67e..4fb8e343c49e26ac9c03b1835b5f31f3c9c2e88e 100644
--- a/gdb/testsuite/gdb.arch/aarch64-fp.exp
+++ b/gdb/testsuite/gdb.arch/aarch64-fp.exp
@@ -75,3 +75,28 @@ gdb_test "p/x \$fpcr" \
"fpcr.*0x\[0-9a-fA-F\].*" \
"check register fpcr value"
+with_test_prefix "bfloat16" {
+ gdb_test "set \$h0.bf = 1.185e-38" \
+ ".*" \
+ "set h0.bf to 129"
+
+ gdb_test "p \$h0" \
+ "h0.*{bf = 1.185e-38, f = 7.689e-06, u = 129, s = 129}" \
+ "h0 fields are valid"
+
+ gdb_test "set \$v0.h.bf\[0\] = 0" \
+ "v0.* = 0" \
+ "set v0.h.bf\[0\] to 0"
+
+ gdb_test "p \$v0.h.s\[0\]" \
+ "v0.* = 0" \
+ "v0.h.s\[0\] is 0"
+
+ gdb_test "set \$v0.h.bf\[0\] = 1.185e-38" \
+ "v0.* = 1.185e-38" \
+ "set v0.h.bf\[0\] to 129"
+
+ gdb_test "p \$v0.h.s\[0\]" \
+ "v0.* = 129" \
+ "v0.h.s\[0\] is 129"
+}
-------------- next part --------------
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 77e6ad700fcdcd5f709aecb537584184dc06d059..b5470f09aa56f27612f15a32927ea911aff970d1 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -2054,6 +2054,9 @@ aarch64_vnh_type (struct gdbarch *gdbarch)
t = arch_composite_type (gdbarch, "__gdb_builtin_type_vnh",
TYPE_CODE_UNION);
+ elem = builtin_type (gdbarch)->builtin_bfloat16;
+ append_composite_type_field (t, "bf", elem);
+
elem = builtin_type (gdbarch)->builtin_half;
append_composite_type_field (t, "f", elem);
@@ -2135,6 +2138,8 @@ aarch64_vnv_type (struct gdbarch *gdbarch)
sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vnh",
TYPE_CODE_UNION);
+ append_composite_type_field (sub, "bf",
+ init_vector_type (bt->builtin_bfloat16, 8));
append_composite_type_field (sub, "f",
init_vector_type (bt->builtin_half, 8));
append_composite_type_field (sub, "u",
diff --git a/gdb/features/aarch64-fpu.c b/gdb/features/aarch64-fpu.c
index 5b636a5f4d20c4e9092d0f4b6762b69e0aa0cfce..a80b7d4c1b8676571325ff9cb19723928a051338 100644
--- a/gdb/features/aarch64-fpu.c
+++ b/gdb/features/aarch64-fpu.c
@@ -37,6 +37,9 @@ create_feature_aarch64_fpu (struct target_desc *result, long regnum)
element_type = tdesc_named_type (feature, "int16");
tdesc_create_vector (feature, "v8i", element_type, 8);
+ element_type = tdesc_named_type (feature, "bfloat16");
+ tdesc_create_vector (feature, "v8bf16", element_type, 8);
+
element_type = tdesc_named_type (feature, "uint8");
tdesc_create_vector (feature, "v16u", element_type, 16);
@@ -68,6 +71,8 @@ create_feature_aarch64_fpu (struct target_desc *result, long regnum)
tdesc_add_field (type_with_fields, "s", field_type);
type_with_fields = tdesc_create_union (feature, "vnh");
+ field_type = tdesc_named_type (feature, "v8bf16");
+ tdesc_add_field (type_with_fields, "bf", field_type);
field_type = tdesc_named_type (feature, "v8f");
tdesc_add_field (type_with_fields, "f", field_type);
field_type = tdesc_named_type (feature, "v8u");
diff --git a/gdb/features/aarch64-fpu.xml b/gdb/features/aarch64-fpu.xml
index 14b313737341381011f68810fdd43d854ac8e96e..2235d072a094065cf7406176e11964d0725dcf91 100644
--- a/gdb/features/aarch64-fpu.xml
+++ b/gdb/features/aarch64-fpu.xml
@@ -17,6 +17,7 @@
<vector id="v8f" type="ieee_half" count="8"/>
<vector id="v8u" type="uint16" count="8"/>
<vector id="v8i" type="int16" count="8"/>
+ <vector id="v8bf16" type="bfloat16" count="8"/>
<vector id="v16u" type="uint8" count="16"/>
<vector id="v16i" type="int8" count="16"/>
<vector id="v1u" type="uint128" count="1"/>
@@ -32,6 +33,7 @@
<field name="s" type="v4i"/>
</union>
<union id="vnh">
+ <field name="bf" type="v8bf16"/>
<field name="f" type="v8f"/>
<field name="u" type="v8u"/>
<field name="s" type="v8i"/>
diff --git a/gdb/testsuite/gdb.arch/aarch64-fp.exp b/gdb/testsuite/gdb.arch/aarch64-fp.exp
index 8d06a3f5201372856f8402d0269c8215cbd0a67e..4fb8e343c49e26ac9c03b1835b5f31f3c9c2e88e 100644
--- a/gdb/testsuite/gdb.arch/aarch64-fp.exp
+++ b/gdb/testsuite/gdb.arch/aarch64-fp.exp
@@ -75,3 +75,28 @@ gdb_test "p/x \$fpcr" \
"fpcr.*0x\[0-9a-fA-F\].*" \
"check register fpcr value"
+with_test_prefix "bfloat16" {
+ gdb_test "set \$h0.bf = 1.185e-38" \
+ ".*" \
+ "set h0.bf to 129"
+
+ gdb_test "p \$h0" \
+ "h0.*{bf = 1.185e-38, f = 7.689e-06, u = 129, s = 129}" \
+ "h0 fields are valid"
+
+ gdb_test "set \$v0.h.bf\[0\] = 0" \
+ "v0.* = 0" \
+ "set v0.h.bf\[0\] to 0"
+
+ gdb_test "p \$v0.h.s\[0\]" \
+ "v0.* = 0" \
+ "v0.h.s\[0\] is 0"
+
+ gdb_test "set \$v0.h.bf\[0\] = 1.185e-38" \
+ "v0.* = 1.185e-38" \
+ "set v0.h.bf\[0\] to 129"
+
+ gdb_test "p \$v0.h.s\[0\]" \
+ "v0.* = 129" \
+ "v0.h.s\[0\] is 129"
+}
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