[PATCH] gdb: riscv_scan_prologue: handle LD instruction
Lancelot SIX
lsix@lancelotsix.com
Mon Aug 9 22:29:15 GMT 2021
>
> Would you be willing to add support for LW? I think the test cold be
> adapted to cover both cases pretty easily, more below...
Yes, I’ll try to do that shortly.
>
> > + addi sp,sp,-32
> > + lla t3,__canary # Load the fake canary address.
> > + ld t4,0(t3) # Load the canary.
>
> As we don't actually check the canary anywhere (unless I'm missing
> something), then you could just add an extra:
You are right. In this test I only reproduce the installation of the
canary. I did not install an epilogue that checks for its value since
has no use in the context of this test.
>
> lw t4,0(t3)
>
> here before the ld, and then both cases will be covered. Adding the
> support for this in GDB should be easy enough (based on SW/SD).
>
> What do you think?
As you point out, the test can easily modified to incorporate a LW
instruction to cover both cases. If I use other registers than T3/T4, I
can also test for C.LD / C.LW (the corresponding instructions from the
compressed instruction set). I did test my implementation against C.LD
but did not include it in the testcase to keep it simple. If I add a LW
I can as well test the 4 instructions (to be more precise, I test that
GDB can scan the prologue past those instructions, I never test what GDB
thinks those instructions do).
Best,
Lancelot.
>
> Thanks,
> Andrew
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