[PATCH 09/24] RISC-V sim: Fix syscall fallback.

[Jim Wilson]

On Sat, Apr 17, 2021 at 10:59 AM Jim Wilson <jimw@sifive.com> wrote:

> From: Kito Cheng <kito.cheng@gmail.com>
>
> Fall back to sim_syscall if we don't handle this syscall.
>
>         sim/riscv/
>         * sim-main.c (execute_i): In case MATCH_ECALL, make default case
>         call sim_syscall.
> ---
>  sim/riscv/sim-main.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
> index 597e9c3..48cf27f 100644
> --- a/sim/riscv/sim-main.c
> +++ b/sim/riscv/sim-main.c
> @@ -1284,7 +1284,8 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const
> struct riscv_opcode *op)
>                 break;
>               }
>             default:
> -             cpu->a0 = -1;
> +             cpu->a0 = sim_syscall (cpu, cpu->a7, cpu->a0,
> +                                    cpu->a1, cpu->a2, cpu->a3);
>               break;
>             }
>         }
> --
> 2.7.4
>

This one is missing a review.

Jim