[PATCH 18/24] RISC-V sim: Improve branch tracing.

[Jim Wilson]

From: Kito Cheng <kito.cheng@gmail.com>

Print target address not offset to target.

	sim/riscv/
	* sim-main.c (execute_i): In cases MATCH_BEQ, MATCH_BLT, MATCH_BLTU,
	MATCH_BGE, and MATCH_BNE, print target address instead of offset.
---
 sim/riscv/sim-main.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
index 70af81f..13adfa9 100644
--- a/sim/riscv/sim-main.c
+++ b/sim/riscv/sim-main.c
@@ -1486,7 +1486,8 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
     case MATCH_BEQ:
       TRACE_INSN (cpu, "beq %s, %s, %#" PRIxTW ";  "
 		       "// if (%s == %s) goto %#" PRIxTW,
-		  rs1_name, rs2_name, sb_imm, rs1_name, rs2_name, sb_imm);
+		  rs1_name, rs2_name, sb_imm, rs1_name, rs2_name,
+		  cpu->pc + sb_imm);
       if (cpu->regs[rs1] == cpu->regs[rs2])
 	{
 	  pc = cpu->pc + sb_imm;
@@ -1496,7 +1497,8 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
     case MATCH_BLT:
       TRACE_INSN (cpu, "blt %s, %s, %#" PRIxTW ";  "
 		       "// if (%s < %s) goto %#" PRIxTW,
-		  rs1_name, rs2_name, sb_imm, rs1_name, rs2_name, sb_imm);
+		  rs1_name, rs2_name, sb_imm, rs1_name, rs2_name,
+		  cpu->pc + sb_imm);
       if ((signed_word) cpu->regs[rs1] < (signed_word) cpu->regs[rs2])
 	{
 	  pc = cpu->pc + sb_imm;
@@ -1506,7 +1508,8 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
     case MATCH_BLTU:
       TRACE_INSN (cpu, "bltu %s, %s, %#" PRIxTW ";  "
 		       "// if (%s < %s) goto %#" PRIxTW,
-		  rs1_name, rs2_name, sb_imm, rs1_name, rs2_name, sb_imm);
+		  rs1_name, rs2_name, sb_imm, rs1_name, rs2_name,
+		  cpu->pc + sb_imm);
       if ((unsigned_word) cpu->regs[rs1] < (unsigned_word) cpu->regs[rs2])
 	{
 	  pc = cpu->pc + sb_imm;
@@ -1516,7 +1519,8 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
     case MATCH_BGE:
       TRACE_INSN (cpu, "bge %s, %s, %#" PRIxTW ";  "
 		       "// if (%s >= %s) goto %#" PRIxTW,
-		  rs1_name, rs2_name, sb_imm, rs1_name, rs2_name, sb_imm);
+		  rs1_name, rs2_name, sb_imm, rs1_name, rs2_name,
+		  cpu->pc + sb_imm);
       if ((signed_word) cpu->regs[rs1] >= (signed_word) cpu->regs[rs2])
 	{
 	  pc = cpu->pc + sb_imm;
@@ -1526,7 +1530,8 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
     case MATCH_BGEU:
       TRACE_INSN (cpu, "bgeu %s, %s, %#" PRIxTW ";  "
 		       "// if (%s >= %s) goto %#" PRIxTW,
-		  rs1_name, rs2_name, sb_imm, rs1_name, rs2_name, sb_imm);
+		  rs1_name, rs2_name, sb_imm, rs1_name, rs2_name,
+		  cpu->pc + sb_imm);
       if ((unsigned_word) cpu->regs[rs1] >= (unsigned_word) cpu->regs[rs2])
 	{
 	  pc = cpu->pc + sb_imm;
@@ -1536,7 +1541,8 @@ execute_i (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
     case MATCH_BNE:
       TRACE_INSN (cpu, "bne %s, %s, %#" PRIxTW ";  "
 		       "// if (%s != %s) goto %#" PRIxTW,
-		  rs1_name, rs2_name, sb_imm, rs1_name, rs2_name, sb_imm);
+		  rs1_name, rs2_name, sb_imm, rs1_name, rs2_name,
+		  cpu->pc + sb_imm);
       if (cpu->regs[rs1] != cpu->regs[rs2])
 	{
 	  pc = cpu->pc + sb_imm;
-- 
2.7.4