[PATCH] gdb: add support for handling core dumps on arm-none-eabi
Paul Mathieu
paulmathieu@google.com
Fri Oct 2 17:32:35 GMT 2020
Core dump files really help debugging crashes.
It is not uncommon for embedded targets to have the ability to generate
memory and CPU register dumps, which can easily be converted into core dump
files.
This patch adds support for loading core files into gdb on arm-none-eabi
targets.
The patch was originally written by Robin Haberkorn <
robin.haberkorn@googlemail.com>
gdb/ChangeLog:
2018-09-29 Robin Haberkorn <robin.haberkorn@googlemail.com>
2020-10-02 Paul Mathieu <paulmathieu@google.com>
* arm-none-tdep.c: Added. Provide CPU registers from a core file
* floating point registers not yet supported (FIXME)
---
gdb/Makefile.in | 2 +
gdb/arm-none-tdep.c | 140 ++++++++++++++++++++++++++++++++++++++++++++
gdb/configure.tgt | 2 +-
3 files changed, 143 insertions(+), 1 deletion(-)
create mode 100644 gdb/arm-none-tdep.c
diff --git a/gdb/Makefile.in b/gdb/Makefile.in
index dbede7a9cf..7f0e3ea0b0 100644
--- a/gdb/Makefile.in
+++ b/gdb/Makefile.in
@@ -720,6 +720,7 @@ ALL_TARGET_OBS = \
arm-obsd-tdep.o \
arm-pikeos-tdep.o \
arm-symbian-tdep.o \
+ arm-none-tdep.o \
arm-tdep.o \
arm-wince-tdep.o \
avr-tdep.o \
@@ -2150,6 +2151,7 @@ ALLDEPFILES = \
arm-nbsd-tdep.c \
arm-obsd-tdep.c \
arm-symbian-tdep.c \
+ arm-none-tdep.c \
arm-tdep.c \
avr-tdep.c \
bfin-linux-tdep.c \
diff --git a/gdb/arm-none-tdep.c b/gdb/arm-none-tdep.c
new file mode 100644
index 0000000000..7641a9f7f0
--- /dev/null
+++ b/gdb/arm-none-tdep.c
@@ -0,0 +1,140 @@
+/* Native-dependent code for GDB targetting embedded ARM.
+
+ Copyright (C) 2020 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
+
+#include "defs.h"
+#include "command.h"
+#include "gdbarch.h"
+#include "gdbcore.h"
+#include "inferior.h"
+#include "target.h"
+#include "regcache.h"
+
+#include "arch/arm.h"
+
+#if 0
+#include <fcntl.h>
+#include <time.h>
+#ifdef HAVE_SYS_PROCFS_H
+#include <sys/procfs.h>
+#endif
+#endif
+
+typedef struct {
+ uint32_t reg[18];
+} gdb_gregset_t;
+
+#define ARM_CPSR_GREGNUM 16
+
+extern int arm_apcs_32;
+
+static void
+arm_supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregs)
+{
+ struct gdbarch *gdbarch = regcache->arch ();
+ enum bfd_endian byte_order = type_byte_order (register_type(gdbarch, 0));
+ int regno;
+ CORE_ADDR reg_pc;
+ gdb_byte pc_buf[ARM_INT_REGISTER_SIZE];
+
+ for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
+ regcache->raw_supply (regno, gregs->reg + regno);
+
+ if (arm_apcs_32)
+ regcache->raw_supply (ARM_PS_REGNUM, gregs->reg + ARM_CPSR_GREGNUM);
+ else
+ regcache->raw_supply (ARM_PS_REGNUM, gregs->reg + ARM_PC_REGNUM);
+
+ reg_pc = extract_unsigned_integer ((const gdb_byte*)(gregs->reg +
ARM_PC_REGNUM),
+ ARM_INT_REGISTER_SIZE, byte_order);
+ reg_pc = gdbarch_addr_bits_remove (gdbarch, reg_pc);
+ store_unsigned_integer (pc_buf, ARM_INT_REGISTER_SIZE, byte_order,
reg_pc);
+ regcache->raw_supply (ARM_PC_REGNUM, pc_buf);
+}
+
+/* Provide registers to GDB from a core file.
+
+ CORE_REG_SECT points to an array of bytes, which are the contents
+ of a `note' from a core file which BFD thinks might contain
+ register contents. CORE_REG_SIZE is its size.
+
+ WHICH says which register set corelow suspects this is:
+ 0 --- the general-purpose register set, in gregset_t format
+ 2 --- the floating-point register set, in fpregset_t format
+
+ REG_ADDR is ignored. */
+
+static void
+fetch_core_registers (struct regcache *regcache,
+ char *core_reg_sect,
+ unsigned core_reg_size,
+ int which,
+ CORE_ADDR reg_addr)
+{
+ switch (which)
+ {
+ case 0:
+ if (core_reg_size != sizeof (gdb_gregset_t))
+ warning (_("Wrong size gregset in core file."));
+ else
+ {
+ gdb_gregset_t gregset;
+ memcpy (&gregset, core_reg_sect, sizeof (gregset));
+ arm_supply_gregset (regcache, &gregset);
+ }
+ break;
+
+#if 0 // TODO
+ case 2:
+ if (core_reg_size != sizeof (gdb_fpregset_t))
+ warning (_("Wrong size fpregset in core file."));
+ else
+ {
+ gdb_fpregset_t fpregset;
+ memcpy (&fpregset, core_reg_sect, sizeof (fpregset));
+ if (gdbarch_fp0_regnum (regcache->arch ()) >= 0)
+ arm_supply_fpregset (regcache, &fpregset);
+ }
+ break;
+#endif
+
+ default:
+ /* We've covered all the kinds of registers we know about here,
+ so this must be something we wouldn't know what to do with
+ anyway. Just ignore it. */
+ break;
+ }
+}
+
+/* Register that we are able to handle ELF core file formats using
+ standard procfs "regset" structures. */
+
+static struct core_fns arm_none_core_fns =
+{
+ bfd_target_elf_flavour, /* core_flavour */
+ default_check_format, /* check_format */
+ default_core_sniffer, /* core_sniffer */
+ fetch_core_registers, /* core_read_registers */
+ NULL /* next */
+};
+
+void
+_initialize_arm_none_tdep (void)
+{
+ deprecated_add_core_fns (&arm_none_core_fns);
+}
diff --git a/gdb/configure.tgt b/gdb/configure.tgt
index a3e11c4b9b..0cf05efdd1 100644
--- a/gdb/configure.tgt
+++ b/gdb/configure.tgt
@@ -189,7 +189,7 @@ arm*-*-symbianelf*)
;;
arm*-*-*)
# Target: ARM embedded system
- gdb_target_obs="arm-pikeos-tdep.o"
+ gdb_target_obs="arm-pikeos-tdep.o arm-none-tdep.o"
gdb_sim=../sim/arm/libsim.a
;;
--
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