[PATCH] [AArch64, record] Record FPSR for SIMD/FP data instructions
Luis Machado
luis.machado@linaro.org
Mon Dec 14 14:43:04 GMT 2020
I noticed this failure in gdb.reverse/reverse-insn.exp:
FAIL: gdb.reverse/insn-reverse.exp: adv_simd_vect_shift: compare registers on insn 0:fcvtzs s0, s0, #1
Turns out we're not recording changes to the FPSR. The SIMD/FP data
instructions may set bits in the FPSR, so it needs to be recorded for
proper reverse operations.
gdb/ChangeLog:
YYYY-MM-DD Luis Machado <luis.machado@linaro.org>
* aarch64-tdep.c (aarch64_record_data_proc_simd_fp): Record FPSR.
---
gdb/aarch64-tdep.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 40c73be502..5858b64970 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -4470,8 +4470,15 @@ aarch64_record_data_proc_simd_fp (insn_decode_record *aarch64_insn_r)
if (record_debug)
debug_printf ("\n");
+ /* Record the V/X register. */
aarch64_insn_r->reg_rec_count++;
- gdb_assert (aarch64_insn_r->reg_rec_count == 1);
+
+ /* Some of these instructions may set bits in the FPSR, so record it
+ too. */
+ record_buf[1] = AARCH64_FPSR_REGNUM;
+ aarch64_insn_r->reg_rec_count++;
+
+ gdb_assert (aarch64_insn_r->reg_rec_count == 2);
REG_ALLOC (aarch64_insn_r->aarch64_regs, aarch64_insn_r->reg_rec_count,
record_buf);
return AARCH64_RECORD_SUCCESS;
--
2.25.1
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