[PATCH] AArch64: Add half float view to V registers

[Alan Hayward]

> On 14 May 2019, at 09:15, Andrew Burgess <andrew.burgess@embecosm.com> wrote:
> 
> * Alan Hayward <Alan.Hayward@arm.com> [2019-04-12 10:45:07 +0000]:
> 
>> AArch64 can fill the vector registers with half precision floats.
>> Add a view for this.
>> 
>> Add builtin type ieee half and connect this to the existing
>> floatformats_ieee_half.
>> 
>> gdb/ChangeLog:
>> 
>> 2019-04-12  Alan Hayward  <alan.hayward@arm.com>
>> 
>>        * aarch64-tdep.c (aarch64_vnh_type): Add half view.
>> 	(aarch64_vnv_type): Likewise.
>>        * target-descriptions.c (make_gdb_type): Add TDESC_TYPE_IEEE_HALF.
>>        * common/tdesc.c: Likewise.
>>        * common/tdesc.h (enum tdesc_type_kind): Likewise.
>>        * features/aarch64-fpu.c (create_feature_aarch64_fpu): Regenerate.
>>        * features/aarch64-fpu.xml: Add ieee half view.
>>        * features/aarch64-sve.c (create_feature_aarch64_fpu): Likewise.
>>        * gdbtypes.c (gdbtypes_post_init): Add builtin_half
>>        * gdbtypes.h (struct builtin_type): Likewise.
>>        (struct objfile_type): Likewise.
> 
> This patch looks fine to apply.  I was a little surprised that this
> didn't require any test updates, but I guess if there's already not
> tests for this stuff then that's fine.

I’ve just doubled checked, and there’s no new fails. Looks like that’s due to
the small number of aarch64 specific tests. Might be worth me adding something
at a later date.
Either way, I’ve pushed this.
Thanks!

Alan.