[PATCH] RISC-V: Allow setting breakpoints at invalid addresses.

Jim Wilson jimw@sifive.com
Sat Apr 13 20:42:00 GMT 2019


Some testsuite testcases construct dwarf2 debug info for fake functions to
test that this debug info is handled correctly.  We get an error trying to
read from an invalid address when setting a breakpoint on these fake functions.
Other targets allow setting breakpoints on invalid addresses, and only error
when a command forces us to write the breakpoint to memory.  This matches that
behavior by wrapping the read in a try/catch.

Tested with a riscv64-linux native testsuite run.  I get 55 fewer unexpected
failures with the patch, and there are no regressions.

	gdb/
	* riscv-tdep.c (riscv_breakpoint_kind_from_pc): Wrap read_code call
	in try/catch.  Set buf[0] to 0 in catch clause.
---
 gdb/riscv-tdep.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index 6370bc268f..38dc578add 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -430,8 +430,19 @@ riscv_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
 	unaligned_p = true;
       else
 	{
-	  /* Read the opcode byte to determine the instruction length.  */
-	  read_code (*pcptr, buf, 1);
+	  try
+	    {
+	      /* Read the opcode byte to determine the instruction length.  */
+	      read_code (*pcptr, buf, 1);
+	    }
+	  catch (const gdb_exception_error &ex)
+	    {
+	      /* We may have tried to set a breakpoint at a invalid address.
+		 Defer the error until we try to write the breakpoint to
+		 memory to match how other gdb targets work.  Also, testsuite
+		 testcases like gdb.cp/nsalias.exp require this behavior.  */
+	      buf[0] = 0;
+	    }
 	}
 
       if (riscv_debug_breakpoints)
-- 
2.17.1



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