[PATCH] gdb/riscv: Improve non-dwarf stack unwinding

[Joel Brobecker]

> While I agree this is true for I-based ISAs, I think this might be able to
> fire for E-based ISAs because those can actually encode invalid register
> indices.  That said, these should be decoded as invalid instructions so I
> think we're safe here.  I'm OK either way (ie, abort or warn).

And FWIW, I agree that should the register number be invalid
in the instruction, the error should be reported during the decoding.
So the asserts here are good.

-- 
Joel