[PATCH] RISC-V: Fix xlen to flen typo in FP reg handling.
Jim Wilson
jimw@sifive.com
Sat Nov 3 03:20:00 GMT 2018
This fixes a bug in FP register handling for targets where xlen != flen.
Tested against riscv-test/debug where it fixes a few failures. Also tested
on RV64GC linux with the gdb testsuite where it has no effect.
gdb/
* riscv-tdep.c (riscv_register_type): Use riscv_isa_flen for FP regs
not riscv_isa_xlen.
---
gdb/riscv-tdep.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c
index db372e2163..b94802aa97 100644
--- a/gdb/riscv-tdep.c
+++ b/gdb/riscv-tdep.c
@@ -630,7 +630,7 @@ riscv_register_type (struct gdbarch *gdbarch, int regnum)
}
else if (regnum <= RISCV_LAST_FP_REGNUM)
{
- regsize = riscv_isa_xlen (gdbarch);
+ regsize = riscv_isa_flen (gdbarch);
switch (regsize)
{
case 4:
--
2.17.1
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