[PATCH 2/2] btrace: set/show record btrace cpu

[Eli Zaretskii]

> From: "Metzger, Markus T" <markus.t.metzger@intel.com>
> CC: "gdb-patches@sourceware.org" <gdb-patches@sourceware.org>
> Date: Tue, 27 Feb 2018 11:41:43 +0000
> > > I rephrased this to "... for enabling workarounds for processor errata
> > > when decoding the trace".
> > 
> > It's better, but still not clear enough.  What kind of "errata" are we talking about?
> > The kind described in https://community.amd.com/thread/186609, for example?
> > And what do the workarounds do?
> > 
> > If you can explain that to me or give an example, I will try to propose some text to
> > describe that in the manual.
> 
> Processor errata are bugs that, in our case, may cause the trace to not match the spec.
> This typically causes unaware decoders to fail with some error.
> 
> An erratum workaround will try to detect an erroneous trace packet sequence and
> correct it.
> 
> In our case, each workaround needs to be enabled separately.  The decoder determines
> the workarounds to be enabled based on the processor on which the trace was recorded.

Thanks.  Then I suggest to have this text in the manual:

  @item set record btrace cpu @var{identifier}
  Set the processor to be used for enabling workarounds for processor
  errata when decoding the trace.

  @cindex processor errata
  @dfn{Processor errata} are bugs in processor firmware that can cause
  a trace not to match the specification.  Trace decoders that are
  unaware of these errata might fail to decode such a trace.
  @value{GDBN} can detect erroneous trace packets and correct them,
  thus avoiding the decoding failures.  These corrections are known as
  @dfn{errata workarounds}, and are enabled based on the processor on
  which the trace was recorded.

  By default, @value{GDBN} attempts to detect the processor
  automatically, and apply the necessary workarounds for it.  However,
  you may need to specify the processor if @value{GDBN} does not yet
  support it.  This command allows you to do that, and also allows to
  disable the workarounds.

  The argument @var{identifier} identifies the @sc{cpu} and is of the
  form:
  [...]

How does that sound?