[PATCH] aarch64 sim fcsel bug fix
Tue Dec 27 02:35:00 GMT 2016
The fcsel instruction is storing source register numbers in the
destination register, instead of source register contents. There are
missing calls to fetch the contents of the source registers.
While looking at this, I ran into the problem that when an FP register
changes from plus zero to minus zero, or vice versa, I don't get any
output with --trace-register. The GCC C testcase I was looking at
happened to be testing support for signed zeros, and the source
register number happened to be zero, so I needed this to work right to
see what was going wrong. I added signbit calls to catch this case.
The testcase fails without the patch, and works with the patch. The
GCC C testsuite unexpected failures drop from 2473 to 2416.
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