[PATCH 1/8] AARCH64 SVE: Increse max register sizes

Joel Brobecker brobecker@adacore.com
Tue Dec 13 11:53:00 GMT 2016

> > >Joel expressed the willingness that we should make MAX_REGISTER_SIZE
> > >gdbarch specific last time when it was changed from 32 to 64.
> > >https://sourceware.org/ml/gdb-patches/2010-09/msg00245.html
> > >I think we should make MAX_REGISTER_SIZE gdbarch specific, or stop
> > >using it at all.
> > 
> > I’m happy to do this if that’s what people want. I avoided doing it
> > because I
> > didn’t want to subtly break something and it’s going to be quite a large
> > change -
> > I might submit it a set of patches by itself.
> > 
> You can start from changing amd64-tdep.c and frame.c, which are
> interesting to most of people here.  It shouldn't take long to finish
> the patch, and post it to get feedback quickly.  If people agree/like
> the change, then you can move on changing the rest in the same way.

I agree. Let's separate this patch from the infrastructure rework.
In particular, I don't remember at the time if I was considering
the impact of making turning the max register size into a dynamic
value - I am thinking a lot of code might be using it in expressions
that assume it is constant (array of MAX_REGISTER_SIZE bytes).
Do people agree that this is an idea worth pursuing? At the moment,
I'm not sure myself...


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