[PATCH 1/8] AARCH64 SVE: Increse max register sizes
Tue Dec 13 11:48:00 GMT 2016
On 16-12-13 10:05:49, Alan Hayward wrote:
> Iâve just noticed I forgot to add a changelog for all of my patches.
> Apologies - Iâll add them for any V2 versions (or happy to repost all of
> them again with changelogs if required).
ChangeLog is not needed for V1.
> On 12/12/2016 18:10, "Yao Qi" <firstname.lastname@example.org> wrote:
> >On 16-12-05 12:26:24, Alan Hayward wrote:
> >> This is part of a series adding AARCH64 SVE support to gdb and
> >> In SVE the maximum size of a variable-length vector register is 256
> >> four
> >> times the current maximum size currently supported in gdb. This patch
> >> increases
> >> the max register size and max gdbserver buffer size accordingly.
> >Joel expressed the willingness that we should make MAX_REGISTER_SIZE
> >gdbarch specific last time when it was changed from 32 to 64.
> >I think we should make MAX_REGISTER_SIZE gdbarch specific, or stop
> >using it at all.
> Iâm happy to do this if thatâs what people want. I avoided doing it
> because I
> didnât want to subtly break something and itâs going to be quite a large
> change -
> I might submit it a set of patches by itself.
You can start from changing amd64-tdep.c and frame.c, which are
interesting to most of people here. It shouldn't take long to finish
the patch, and post it to get feedback quickly. If people agree/like
the change, then you can move on changing the rest in the same way.
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