[PATCH] (ARM Cortex-M) FPU and PSP aware exception frame unwinder
Tristan Gingold
gingold@adacore.com
Thu Apr 14 06:34:00 GMT 2016
> On 11 Apr 2016, at 23:56, Pedro Alves <palves@redhat.com> wrote:
>
> Hi,
>
> [Adding a few folks who either worked on or expressed
> interest in this before.]
>
> On 04/07/2016 11:07 PM, James-Adam Renquinha Henri wrote:
>> I submitted it as a bug to the GNU ARM Embedded initially, see here for
>> details: https://bugs.launchpad.net/gcc-arm-embedded/+bug/1566054
>>
>> Basically, this patch allow gdb to unwind properly an extended stack
>> frame, that is an exception frame with FPU state stacked. Additionally,
>> because all Cortex-M variants have 2 stack pointers, the Main Stack
>> Pointer (MSP) and the Process Stack Pointer (PSP), the code in the patch
>> also check which stack was used prior to the exception. That way,
>> backtraces work beautifully.
>>
>> In my original submission, I mentioned a known issue that I didn't try
>> to fix *yet*, because that would involve a lot more work, and the impact
>> is relatively minor: for a given outer frame, some FPU registers may not
>> be reported correctly. I hope you don't mind too much. I consider the
>> current patch still useful, because at least backtraces work, and it's
>> an annoyance not to be able to get them.
>>
>
> Thanks for the patch. However, we should really add new target
> descriptions/features that describe these registers to gdb
> instead of looking them up by name. Please see:
>
> https://sourceware.org/ml/gdb-patches/2015-12/msg00273.html
>
> And see more in this earlier attempt at getting the unwinder working:
>
> https://sourceware.org/ml/gdb-patches/2014-09/msg00649.html
>
> Tristan also wrote yet another patch for the same, as mentioned at:
>
> https://sourceware.org/ml/gdb-patches/2015-12/msg00281.html
>
> Tristan, did you ever manage to post that?
Not yet. But I have tested it with two different probes.
> Lots of duplicated effort. :-/ :-(
Indeed. But we know that the common part is correct!
Tristan.
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