[PATCH] [AArch64] Fix incorrect mask when decoding b.cond instruction
Pierre Langlois
pierre.langlois@arm.com
Fri Sep 11 09:20:00 GMT 2015
Hi all,
The encoding of the b.cond instruction is described in the architecture
reference manual as:
b.cond 0101 0100 iiii iiii iiii iiii iii0 cccc
So the mask should be 0xff000010.
I've regression tested it on aarch64-linux, I haven't seen any difference
with or without the patch.
Thanks,
Pierre
gdb/ChangeLog:
* aarch64-tdep.c (decode_bcond): Fix incorrect mask.
---
gdb/aarch64-tdep.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 9a44446..a4d8186 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -339,7 +339,8 @@ decode_b (CORE_ADDR addr, uint32_t insn, int *is_bl, int32_t *offset)
static int
decode_bcond (CORE_ADDR addr, uint32_t insn, unsigned *cond, int32_t *offset)
{
- if (decode_masked_match (insn, 0xfe000000, 0x54000000))
+ /* b.cond 0101 0100 iiii iiii iiii iiii iii0 cccc */
+ if (decode_masked_match (insn, 0xff000010, 0x54000000))
{
*cond = (insn >> 0) & 0xf;
*offset = extract_signed_bitfield (insn, 19, 5) << 2;
--
2.4.6
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