[PATCH 10/11] Rename emit_load_store to aarch64_emit_load_store
Yao Qi
qiyaoltc@gmail.com
Wed Oct 7 09:26:00 GMT 2015
Likewise, this patch renames emit_load_store to
aarch64_emit_load_store.
gdb:
2015-10-05 Yao Qi <yao.qi@linaro.org>
* arch/aarch64-insn.c (emit_load_store): Rename to ...
(aarch64_emit_load_store): ... it. All callers updated.
gdb/gdbserver:
2015-10-05 Yao Qi <yao.qi@linaro.org>
* linux-aarch64-low.c: Update all callers as emit_load_store
is renamed to aarch64_emit_load_store.
---
gdb/arch/aarch64-insn.c | 10 +++++-----
gdb/arch/aarch64-insn.h | 14 +++++++-------
gdb/gdbserver/linux-aarch64-low.c | 6 +++---
3 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/gdb/arch/aarch64-insn.c b/gdb/arch/aarch64-insn.c
index 99f4fb9..0ec7269 100644
--- a/gdb/arch/aarch64-insn.c
+++ b/gdb/arch/aarch64-insn.c
@@ -342,11 +342,11 @@ aarch64_emit_insn (uint32_t *buf, uint32_t insn)
/* Helper function emitting a load or store instruction. */
int
-emit_load_store (uint32_t *buf, uint32_t size,
- enum aarch64_opcodes opcode,
- struct aarch64_register rt,
- struct aarch64_register rn,
- struct aarch64_memory_operand operand)
+aarch64_emit_load_store (uint32_t *buf, uint32_t size,
+ enum aarch64_opcodes opcode,
+ struct aarch64_register rt,
+ struct aarch64_register rn,
+ struct aarch64_memory_operand operand)
{
uint32_t op;
diff --git a/gdb/arch/aarch64-insn.h b/gdb/arch/aarch64-insn.h
index 37ef37e..d51cabc 100644
--- a/gdb/arch/aarch64-insn.h
+++ b/gdb/arch/aarch64-insn.h
@@ -269,7 +269,7 @@ void aarch64_relocate_instruction (uint32_t insn,
0 .. 32760 range (12 bits << 3). */
#define emit_ldr(buf, rt, rn, operand) \
- emit_load_store (buf, rt.is64 ? 3 : 2, LDR, rt, rn, operand)
+ aarch64_emit_load_store (buf, rt.is64 ? 3 : 2, LDR, rt, rn, operand)
/* Write a LDRSW instruction into *BUF. The register size is 64-bit.
@@ -283,7 +283,7 @@ void aarch64_relocate_instruction (uint32_t insn,
0 .. 16380 range (12 bits << 2). */
#define emit_ldrsw(buf, rt, rn, operand) \
- emit_load_store (buf, 3, LDRSW, rt, rn, operand)
+ aarch64_emit_load_store (buf, 3, LDRSW, rt, rn, operand)
/* Write a TBZ or TBNZ instruction into *BUF.
@@ -312,10 +312,10 @@ void aarch64_relocate_instruction (uint32_t insn,
int aarch64_emit_insn (uint32_t *buf, uint32_t insn);
-int emit_load_store (uint32_t *buf, uint32_t size,
- enum aarch64_opcodes opcode,
- struct aarch64_register rt,
- struct aarch64_register rn,
- struct aarch64_memory_operand operand);
+int aarch64_emit_load_store (uint32_t *buf, uint32_t size,
+ enum aarch64_opcodes opcode,
+ struct aarch64_register rt,
+ struct aarch64_register rn,
+ struct aarch64_memory_operand operand);
#endif
diff --git a/gdb/gdbserver/linux-aarch64-low.c b/gdb/gdbserver/linux-aarch64-low.c
index 963511b..9cefdda 100644
--- a/gdb/gdbserver/linux-aarch64-low.c
+++ b/gdb/gdbserver/linux-aarch64-low.c
@@ -902,7 +902,7 @@ emit_ldrh (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand)
{
- return emit_load_store (buf, 1, LDR, rt, rn, operand);
+ return aarch64_emit_load_store (buf, 1, LDR, rt, rn, operand);
}
/* Write a LDRB instruction into *BUF.
@@ -921,7 +921,7 @@ emit_ldrb (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand)
{
- return emit_load_store (buf, 0, LDR, rt, rn, operand);
+ return aarch64_emit_load_store (buf, 0, LDR, rt, rn, operand);
}
@@ -942,7 +942,7 @@ emit_str (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand)
{
- return emit_load_store (buf, rt.is64 ? 3 : 2, STR, rt, rn, operand);
+ return aarch64_emit_load_store (buf, rt.is64 ? 3 : 2, STR, rt, rn, operand);
}
/* Helper function emitting an exclusive load or store instruction. */
--
1.9.1
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