[PATCH] Fix ARM machine state testcase failures

Yao Qi yao@codesourcery.com
Mon Oct 20 04:00:00 GMT 2014


Luis Machado <lgustavo@codesourcery.com> writes:

> Can PUSH/POP always be described as a LD/ST instruction though? The

Yes, I think so.  PUSH/POP is the special case of LD/ST instruction, in
terms of instruction encoding, see details blow.

> documentation seems to indicate this is not always the case.
>
> For POP, we have two encodings: A1 and A2. For A1, the documentation
> [1] states that we should use LDM/LDMIA/LDFD if
> BitCount(register_list) < 2. I interpreted this as "Unless we are
> popping only a single register, we should use the POP instruction".

The doc suggests what instructions to use here, nothing to do with
instruction encoding.

 - POP A2 (POP instruction encoding A2) is a special case of LDR
   (immediate, ARM) A1.

   LDR (immediate, ARM), Encoding A1:
   cond  0 1 0 P U 0 W 1 Rn       Rt  imm12
   POP Encoding A2:
   cond  0 1 0 0 1 0 0 1 1 1 0 1  Rt 0 0 0 0 0 0 0 0 0 1 0 0

   we decode POP A2 as a LDR (immediate) A1, that means, P = 0, U = 1,
   W = 0, Rn = 13, imm12 = 4.  Then, index = false, add = true, wback =
   true,

   This is the post-indexed addressing.  IOW, "pop {r1}" is the same
   encoding as "ldr r1, [sp], #4".

 - POP A1 is a special case of LDMIA A1.

   LDMIA Encoding A1:
   cond 1 0 0 0 1 0 W 1 Rn        register_list
   POP Encoding A1:
   cond 1 0 0 0 1 0 1 1 (1 1 0 1) register_list

   we code POP A1 as a LDIMA, that means W = 1, Rn = 13.  IOW,
   "pop {r1, r2}" encoding is the same as "ldmia sp!, {r1, r2}".

 - PUSH A1 is a special case of STMDB A1.

   STMDB A1:
   cond 1 0 0 1 0 0 W 0 Rn      register_list

   PUSH A1:
   cond 1 0 0 1 0 0 1 0 1 1 0 1 register_list

   we decode PUSH A1 as STMDB A1, that means W = 1, Rn = 13.
   "push {r1, r2}" is the same encoding as "stmdb sp!, {r1, r2}".

 - Push A2 is a special case of STR (immediate ARM) A1.

   STR (immediate) A1:
   cond 0 1 0 P U 0 W 0 Rn      Rt imm12

   PUSH A2:
   cond 0 1 0 1 0 0 1 0 1 1 0 1 Rt 0 0 0 0 0 0 0 0 0 1 0 0

   we code PUSH A2 as STR (immediate) A1, then P = 1, U = 0, W = 1, Rn =
   13, imm12 = 4.  This is the STR with pre-indexed addressing mode.  Instruction
   "push {r1}" encoding is the same as "str r1, [sp, #-4]!".

IMO, we should fix gdb handling ld/st instructions in reverse debugging,
instead of handling only push/pop instructions.

-- 
Yao (齐尧)



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