[commit] Use 16-bit integer type for rl78 register pairs
Kevin Buettner
kevinb@redhat.com
Tue Feb 25 07:36:00 GMT 2014
This patch changes rl78-tdep.c so that a 16-bit type is used for
register pairs instead of a pointer type as was previously the case.
This will cause these register pairs to be displayed as integers
instead of as a data address with a 0xf0000 ORed in.
E.g. registers ax, bc, de, and hl might now be displayed like this:
(gdb) info registers ax bc de hl
ax 0x6 6
bc 0x0 0
de 0x10c3 4291
hl 0x108d 423
Whereas, before, they were displayed as follows:
(gdb) info registers ax bc de hl
ax 0xf0006 0xf0006
bc 0xf0000 0xf0000
de 0xf10c3 0xf10c3
hl 0xf108d 0xf108d
These pairs are 16 bit quantities and should be displayed as such.
This change also affects the way that the banked register pairs are
displayed. Within GDB, the banked register pairs are named bank0_rp0,
bank0_rp1, .., bank3_rp2, bank3_rp3.
However, these register pairs need to be used as addresses in DWARF
expressions. I have added 16 pseudo registers corresponding to banked
register pairs. These new pseudo registers are all hidden from the
user and have a pointer type. Values from these registers are
intended to be used in DWARF expressions. Therefore,
rl78_dwarf_reg_to_regnum() has been adjusted to return these new
pseudo register numbers.
I had a much simpler patch which only changed the types, but it showed
a number of regressions due to integer values from the banked register
pairs being used as part of an address expression. This current patch
shows no regressions and now displays values of register pairs
correctly.
* rl78-tdep.c ( RL78_BANK0_RP0_PTR_REGNUM, RL78_BANK0_RP1_PTR_REGNUM)
(RL78_BANK0_RP2_PTR_REGNUM, RL78_BANK0_RP3_PTR_REGNUM)
(RL78_BANK1_RP0_PTR_REGNUM, RL78_BANK1_RP1_PTR_REGNUM)
(RL78_BANK1_RP2_PTR_REGNUM, RL78_BANK1_RP3_PTR_REGNUM)
(RL78_BANK2_RP0_PTR_REGNUM, RL78_BANK2_RP1_PTR_REGNUM)
(RL78_BANK2_RP2_PTR_REGNUM, RL78_BANK2_RP3_PTR_REGNUM)
(RL78_BANK3_RP0_PTR_REGNUM, RL78_BANK3_RP1_PTR_REGNUM)
(RL78_BANK3_RP2_PTR_REGNUM, RL78_BANK3_RP3_PTR_REGNUM):
New constants.
(rl78_register_type): Use a data pointer type for SP and
new pseudo registers mentioned above. Use a 16 bit integer
type for all other register pairs.
(rl78_register_name, rl78_g10_register_name): Update for
new pseudo registers.
(rl78_pseudo_register_read): Likewise.
(rl78_pseudo_register_write): Likewise.
(rl78_dwarf_reg_to_regnum): Return register numbers representing
to the newly added pseudo registers.
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 9f9088d..4758b87 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,24 @@
+2014-02-25 Kevin Buettner <kevinb@redhat.com>
+
+ * rl78-tdep.c ( RL78_BANK0_RP0_PTR_REGNUM, RL78_BANK0_RP1_PTR_REGNUM)
+ (RL78_BANK0_RP2_PTR_REGNUM, RL78_BANK0_RP3_PTR_REGNUM)
+ (RL78_BANK1_RP0_PTR_REGNUM, RL78_BANK1_RP1_PTR_REGNUM)
+ (RL78_BANK1_RP2_PTR_REGNUM, RL78_BANK1_RP3_PTR_REGNUM)
+ (RL78_BANK2_RP0_PTR_REGNUM, RL78_BANK2_RP1_PTR_REGNUM)
+ (RL78_BANK2_RP2_PTR_REGNUM, RL78_BANK2_RP3_PTR_REGNUM)
+ (RL78_BANK3_RP0_PTR_REGNUM, RL78_BANK3_RP1_PTR_REGNUM)
+ (RL78_BANK3_RP2_PTR_REGNUM, RL78_BANK3_RP3_PTR_REGNUM):
+ New constants.
+ (rl78_register_type): Use a data pointer type for SP and
+ new pseudo registers mentioned above. Use a 16 bit integer
+ type for all other register pairs.
+ (rl78_register_name, rl78_g10_register_name): Update for
+ new pseudo registers.
+ (rl78_pseudo_register_read): Likewise.
+ (rl78_pseudo_register_write): Likewise.
+ (rl78_dwarf_reg_to_regnum): Return register numbers representing
+ to the newly added pseudo registers.
+
2014-02-24 Doug Evans <dje@google.com>
* value.c (record_latest_value): Fix comment.
diff --git a/gdb/rl78-tdep.c b/gdb/rl78-tdep.c
index ec5d588..6966f5b 100644
--- a/gdb/rl78-tdep.c
+++ b/gdb/rl78-tdep.c
@@ -178,6 +178,29 @@ enum
RL78_BANK3_RP2_REGNUM,
RL78_BANK3_RP3_REGNUM,
+ /* These are the same as the above 16 registers, but have
+ a pointer type for use as base registers in expression
+ evaluation. These are not user visible registers. */
+ RL78_BANK0_RP0_PTR_REGNUM,
+ RL78_BANK0_RP1_PTR_REGNUM,
+ RL78_BANK0_RP2_PTR_REGNUM,
+ RL78_BANK0_RP3_PTR_REGNUM,
+
+ RL78_BANK1_RP0_PTR_REGNUM,
+ RL78_BANK1_RP1_PTR_REGNUM,
+ RL78_BANK1_RP2_PTR_REGNUM,
+ RL78_BANK1_RP3_PTR_REGNUM,
+
+ RL78_BANK2_RP0_PTR_REGNUM,
+ RL78_BANK2_RP1_PTR_REGNUM,
+ RL78_BANK2_RP2_PTR_REGNUM,
+ RL78_BANK2_RP3_PTR_REGNUM,
+
+ RL78_BANK3_RP0_PTR_REGNUM,
+ RL78_BANK3_RP1_PTR_REGNUM,
+ RL78_BANK3_RP2_PTR_REGNUM,
+ RL78_BANK3_RP3_PTR_REGNUM,
+
RL78_NUM_TOTAL_REGS,
RL78_NUM_PSEUDO_REGS = RL78_NUM_TOTAL_REGS - RL78_NUM_REGS
};
@@ -251,8 +274,12 @@ rl78_register_type (struct gdbarch *gdbarch, int reg_nr)
|| (RL78_BANK0_R0_REGNUM <= reg_nr
&& reg_nr <= RL78_BANK3_R7_REGNUM))
return tdep->rl78_int8;
- else
+ else if (reg_nr == RL78_SP_REGNUM
+ || (RL78_BANK0_RP0_PTR_REGNUM <= reg_nr
+ && reg_nr <= RL78_BANK3_RP3_PTR_REGNUM))
return tdep->rl78_data_pointer;
+ else
+ return tdep->rl78_int16;
}
/* Implement the "register_name" gdbarch method. */
@@ -379,7 +406,12 @@ rl78_register_name (struct gdbarch *gdbarch, int regnr)
"bank3_rp0",
"bank3_rp1",
"bank3_rp2",
- "bank3_rp3"
+ "bank3_rp3",
+
+ /* The 16 register slots would be named
+ bank0_rp0_ptr_regnum ... bank3_rp3_ptr_regnum, but we don't
+ want these to be user visible registers. */
+ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", ""
};
return reg_names[regnr];
@@ -509,7 +541,12 @@ rl78_g10_register_name (struct gdbarch *gdbarch, int regnr)
"",
"",
"",
- ""
+ "",
+
+ /* The 16 register slots would be named
+ bank0_rp0_ptr_regnum ... bank3_rp3_ptr_regnum, but we don't
+ want these to be user visible registers. */
+ "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", ""
};
return reg_names[regnr];
@@ -595,6 +632,15 @@ rl78_pseudo_register_read (struct gdbarch *gdbarch,
if (status == REG_VALID)
status = regcache_raw_read (regcache, raw_regnum + 1, buffer + 1);
}
+ else if (RL78_BANK0_RP0_PTR_REGNUM <= reg && reg <= RL78_BANK3_RP3_PTR_REGNUM)
+ {
+ int raw_regnum = 2 * (reg - RL78_BANK0_RP0_PTR_REGNUM)
+ + RL78_RAW_BANK0_R0_REGNUM;
+
+ status = regcache_raw_read (regcache, raw_regnum, buffer);
+ if (status == REG_VALID)
+ status = regcache_raw_read (regcache, raw_regnum + 1, buffer + 1);
+ }
else if (reg == RL78_SP_REGNUM)
{
status = regcache_raw_read (regcache, RL78_SPL_REGNUM, buffer);
@@ -666,6 +712,14 @@ rl78_pseudo_register_write (struct gdbarch *gdbarch,
regcache_raw_write (regcache, raw_regnum, buffer);
regcache_raw_write (regcache, raw_regnum + 1, buffer + 1);
}
+ else if (RL78_BANK0_RP0_PTR_REGNUM <= reg && reg <= RL78_BANK3_RP3_PTR_REGNUM)
+ {
+ int raw_regnum = 2 * (reg - RL78_BANK0_RP0_PTR_REGNUM)
+ + RL78_RAW_BANK0_R0_REGNUM;
+
+ regcache_raw_write (regcache, raw_regnum, buffer);
+ regcache_raw_write (regcache, raw_regnum + 1, buffer + 1);
+ }
else if (reg == RL78_SP_REGNUM)
{
regcache_raw_write (regcache, RL78_SPL_REGNUM, buffer);
@@ -1056,9 +1110,10 @@ rl78_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
if (0 <= reg && reg <= 31)
{
if ((reg & 1) == 0)
- /* Map even registers to their 16-bit counterparts. This
- is usually what is required from the DWARF info. */
- return (reg >> 1) + RL78_BANK0_RP0_REGNUM;
+ /* Map even registers to their 16-bit counterparts which have a
+ pointer type. This is usually what is required from the DWARF
+ info. */
+ return (reg >> 1) + RL78_BANK0_RP0_PTR_REGNUM;
else
return reg;
}
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