[PATCH v2] aarch64/gdbserver: fix floating point registers display
Catalin Udma
catalin.udma@freescale.com
Fri Aug 22 06:59:00 GMT 2014
When using aarch64 gdb with gdbserver, floating point registers are
not correctly displayed, as below:
(gdb) info registers fpsr fpcr
fpsr <unavailable>
fpcr <unavailable>
To fix these problems, the missing fpsr and fpcr registers are added
when floating point registers are read/write
gdb/gdbserver/
2014-08-12 Catalin Udma <catalin.udma@freescale.com>
* linux-aarch64-low.c (AARCH64_FPSR_REGNO): New define.
(AARCH64_FPCR_REGNO): Likewise.
(AARCH64_NUM_REGS): Update to include fpsr/fpcr registers.
(aarch64_fill_fpregset): Add missing fpsr/fpcr registers.
(aarch64_store_fpregset): Likewise.
---
gdb/gdbserver/linux-aarch64-low.c | 8 +++++++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/gdb/gdbserver/linux-aarch64-low.c b/gdb/gdbserver/linux-aarch64-low.c
index 6066e15..3453b2e 100644
--- a/gdb/gdbserver/linux-aarch64-low.c
+++ b/gdb/gdbserver/linux-aarch64-low.c
@@ -46,8 +46,10 @@ extern const struct target_desc *tdesc_aarch64;
#define AARCH64_PC_REGNO 32
#define AARCH64_CPSR_REGNO 33
#define AARCH64_V0_REGNO 34
+#define AARCH64_FPSR_REGNO (AARCH64_V0_REGNO + AARCH64_V_REGS_NUM)
+#define AARCH64_FPCR_REGNO (AARCH64_V0_REGNO + AARCH64_V_REGS_NUM + 1)
-#define AARCH64_NUM_REGS (AARCH64_V0_REGNO + AARCH64_V_REGS_NUM)
+#define AARCH64_NUM_REGS (AARCH64_V0_REGNO + AARCH64_V_REGS_NUM + 2)
static int
aarch64_regmap [] =
@@ -255,6 +257,8 @@ aarch64_fill_fpregset (struct regcache *regcache, void *buf)
for (i = 0; i < AARCH64_V_REGS_NUM; i++)
collect_register (regcache, AARCH64_V0_REGNO + i, ®set->vregs[i]);
+ collect_register (regcache, AARCH64_FPSR_REGNO, ®set->fpsr);
+ collect_register (regcache, AARCH64_FPCR_REGNO, ®set->fpcr);
}
static void
@@ -265,6 +269,8 @@ aarch64_store_fpregset (struct regcache *regcache, const void *buf)
for (i = 0; i < AARCH64_V_REGS_NUM; i++)
supply_register (regcache, AARCH64_V0_REGNO + i, ®set->vregs[i]);
+ supply_register (regcache, AARCH64_FPSR_REGNO, ®set->fpsr);
+ supply_register (regcache, AARCH64_FPCR_REGNO, ®set->fpcr);
}
/* Debugging of hardware breakpoint/watchpoint support. */
--
1.7.8
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