RFA: V850 sim: Accept "LDSR rN, selID"
Nick Clifton
nickc@redhat.com
Fri May 10 07:20:00 GMT 2013
Hi DJ,
Attached is a small patch to allow the simulation of the V850 LDSR
instruction to accept the variant where a register bank is also
specified. For the moment the patch ignores this "selID" parameter,
but being able to recognise the instruction allows the simulator to
cope with code produced by non-GCC compilers.
Ok to apply ?
Cheers
Nick
sim/v850/ChangeLog
2013-05-10 Nick Clifton <nickc@redhat.com>
* v850.igen (LDSR): Accept but ignore a selID parameter.
Index: sim/v850/v850.igen
===================================================================
RCS file: /cvs/cvsfiles/devo/sim/v850/v850.igen,v
retrieving revision 1.46
diff -u -3 -p -r1.46 v850.igen
--- sim/v850/v850.igen 8 Feb 2013 16:14:52 -0000 1.46
+++ sim/v850/v850.igen 21 Feb 2013 13:36:49 -0000
@@ -932,13 +932,16 @@ rrrrr!0,111111,RRRRR + ddddddddddddddd,1
// LDSR
-regID,111111,RRRRR + 0000000000100000:IX:::ldsr
-"ldsr r<reg1>, s<regID>"
+regID,111111,RRRRR + selID,00000100000:IX:::ldsr
+"ldsr r<reg1>, s<regID>":(selID == 0)
+"ldsr r<reg1>, s<regID>, <selID>"
{
uint32 sreg = GR[reg1];
TRACE_ALU_INPUT1 (GR[reg1]);
-
- if ((idecode_issue == idecode_v850e2_issue
+
+ /* FIXME: For now we ignore the selID. */
+
+ if ((idecode_issue == idecode_v850e2_issue
|| idecode_issue == idecode_v850e3v5_issue
|| idecode_issue == idecode_v850e2v3_issue)
&& regID < 28)
More information about the Gdb-patches
mailing list