[PATCH 1/3] Add sp_regnum_from_eax and pc_regnum_from_eax

[H.J. Lu]

On Tue, Jul 3, 2012 at 8:54 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Tue, Jul 3, 2012 at 7:08 AM, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>>> Date: Thu, 21 Jun 2012 11:14:52 -0700
>>> From: "H.J. Lu" <hongjiu.lu@intel.com>
>>>
>>> Hi,
>>>
>>> Here are the first of the last 3 patches for x32 support in GDB.  This
>>> patch maps $pc to $eip and $sp to $esp for x32.  OK to install?
>>
>> The pseudo register handling code is getting too complex :(.  I feel
>> that hiding the set_gdbarch_pc_regnum() and set_gdbarch_sp_regnum()
>> calls in i386-tdep.c isn't the right approach.  But I haven't found a
>> better one yet :(.
>>
>
> One possibility is to set pc/sp to register name instead of regnum.
> i386_gdbarch_init can map them to regnum after all pseudo registers
> are finalized.
>
> --
> H.J.

How about this patch? I can also change amd64 and i386
to use "rsp/"rsp"/"esp"/"eip".

Thanks.

-- 
H.J.
---
	* amd64-tdep.c (amd64_x32_init_abi): Set sp_pseudo_reg to
	"esp" and pc_pseudo_reg to "eip".

	* i386-tdep.c (i386_gdbarch_init): Initialize sp_pseudo_reg
	and pc_pseudo_reg to NULL.  Update SP regnum from sp_pseudo_reg
	and PC regnum from pc_pseudo_reg if needed.

	* i386-tdep.h (gdbarch_tdep): Add sp_pseudo_reg and pc_pseudo_reg.

diff --git a/gdb/amd64-tdep.c b/gdb/amd64-tdep.c
index 8ae1142..d59b8c1 100644
--- a/gdb/amd64-tdep.c
+++ b/gdb/amd64-tdep.c
@@ -2946,6 +2946,9 @@ amd64_x32_init_abi (struct gdbarch_info info,
struct gdbarch *gdbarch)
     tdesc = tdesc_x32;
   tdep->tdesc = tdesc;

+  tdep->sp_pseudo_reg = "esp";
+  tdep->pc_pseudo_reg = "eip";
+
   tdep->num_dword_regs = 17;
   set_tdesc_pseudo_register_type (gdbarch, amd64_x32_pseudo_register_type);

diff --git a/gdb/i386-tdep.c b/gdb/i386-tdep.c
index fd5969d..a9fee8f 100644
--- a/gdb/i386-tdep.c
+++ b/gdb/i386-tdep.c
@@ -7610,6 +7610,7 @@ i386_gdbarch_init (struct gdbarch_info info,
struct gdbarch_list *arches)
   const struct target_desc *tdesc;
   int mm0_regnum;
   int ymm0_regnum;
+  int num_sp_pc_regs;

   /* If there is already a candidate, use it.  */
   arches = gdbarch_list_lookup_by_info (arches, &info);
@@ -7805,6 +7806,9 @@ i386_gdbarch_init (struct gdbarch_info info,
struct gdbarch_list *arches)
   tdep->num_mmx_regs = 8;
   tdep->num_ymm_regs = 0;

+  tdep->sp_pseudo_reg = NULL;
+  tdep->pc_pseudo_reg = NULL;
+
   tdesc_data = tdesc_data_alloc ();

   set_gdbarch_relocate_instruction (gdbarch, i386_relocate_instruction);
@@ -7871,6 +7875,43 @@ i386_gdbarch_init (struct gdbarch_info info,
struct gdbarch_list *arches)
   else
     tdep->mm0_regnum = -1;

+  /* Check pseudo SP/PC register support.  */
+  num_sp_pc_regs = 0;
+  if (tdep->sp_pseudo_reg != NULL)
+    num_sp_pc_regs++;
+  if (tdep->pc_pseudo_reg != NULL)
+    num_sp_pc_regs++;
+
+  if (num_sp_pc_regs)
+    {
+      int num_regs = gdbarch_num_regs (gdbarch);
+      int num_pseudo_regs = gdbarch_num_pseudo_regs (gdbarch);
+      int regno, sp_pc_regs = 0;
+      const char *regname;
+
+      for (regno = num_regs;
+	   regno < num_regs + num_pseudo_regs;
+	   regno++)
+	{
+	  regname = tdesc_register_name (gdbarch, regno);
+	  if (regname && regname[0] != '\0')
+	    {
+	      if (strcmp (regname, tdep->sp_pseudo_reg) == 0)
+		{
+		  set_gdbarch_sp_regnum (gdbarch, regno);
+		  sp_pc_regs++;
+		}
+	      else if (strcmp (regname, tdep->pc_pseudo_reg) == 0)
+		{
+		  set_gdbarch_pc_regnum (gdbarch, regno);
+		  sp_pc_regs++;
+		}
+	    }
+	  if (sp_pc_regs == num_sp_pc_regs)
+	    break;
+	}
+    }
+
   /* Hook in the legacy prologue-based unwinders last (fallback).  */
   frame_unwind_append_unwinder (gdbarch, &i386_stack_tramp_frame_unwind);
   frame_unwind_append_unwinder (gdbarch, &i386_sigtramp_frame_unwind);
diff --git a/gdb/i386-tdep.h b/gdb/i386-tdep.h
index 5f233f5..6e53ff1 100644
--- a/gdb/i386-tdep.h
+++ b/gdb/i386-tdep.h
@@ -155,6 +155,14 @@ struct gdbarch_tdep
   /* Number of SSE registers.  */
   int num_xmm_regs;

+  /* Pseudo register name for SP.  Set this to NULL to disable pseudo SP
+     register support.  */
+  const char *sp_pseudo_reg;
+
+  /* Pseudo register name for PC.  Set this to NULL to disable pseudo PC
+     register support.  */
+  const char *pc_pseudo_reg;
+
   /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
      register), excluding the x87 bit, which are supported by this GDB.  */