RFA: Add Epiphany simulator port

[Joern Rennecke]

The full gdb port might take a while longer to be ready for submission,
so I would like to submit the simulator ahead, so that the toolchain can
be properly tested.
The cgen source files have already been added to the cpu directory as part
of the binutils port contribution.
The attached patches contain the missing pieces of the simulator, i.e.
a bit of configury in gdb/ and sim/, generated files and assorted glue logic
in sim/ , and the testsuite.

2012-01-27  Joern Rennecke  <joern.rennecke@embecosm.com>
             Jeremy Bennett  <jeremy.bennett@embecosm.com>
             Alan Lehotsky  <apl@alum.mit.edu>

sim:
         * configure.tgt: Add epiphany support.
         * common/gennltvals.sh: Add epiphany stanza.
         * configure: Regenerate.
         * common/nltvals.def: Likewise.
         * epiphany: New directory.

sim/testsuite:
         * configure: Regenerate.
         * sim/epiphany: Likewise.
         * epiphany-elf: Likewise.

gdb:

2011-07-18  Jeremy Bennett  <jeremy.bennett@embecosm.com>

         * configure.tgt: Added epiphany-*-elf* target

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gdb:

Index: gdb/configure.tgt
===================================================================
RCS file: /cvs/src/src/gdb/configure.tgt,v
retrieving revision 1.249
diff -p -u -r1.249 configure.tgt
--- gdb/configure.tgt	10 Jan 2012 16:30:43 -0000	1.249
+++ gdb/configure.tgt	27 Jan 2012 18:06:57 -0000
@@ -121,6 +121,12 @@ cris*)
 	gdb_target_obs="cris-tdep.o solib-svr4.o"
 	;;
 
+epiphany-*-elf*)
+	# Target: Adapteva EPIPHANY embedded system
+	gdb_target_obs="epiphany-tdep.o"
+	gdb_sim=../sim/epiphany/libsim.a
+	;;
+
 frv-*-*)
 	# Target: Fujitsu FRV processor
 	gdb_target_obs="frv-tdep.o frv-linux-tdep.o linux-tdep.o solib-frv.o"
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sim:

Index: configure.tgt
===================================================================
RCS file: /cvs/src/src/sim/configure.tgt,v
retrieving revision 1.5
diff -p -u -r1.5 configure.tgt
--- configure.tgt	29 Nov 2011 03:49:09 -0000	1.5
+++ configure.tgt	27 Jan 2012 23:03:35 -0000
@@ -38,6 +38,10 @@ case "${target}" in
    d10v-*-*)
        SIM_ARCH(d10v)
        ;;
+   epiphany-*-*)
+       SIM_ARCH(epiphany)
+       sim_testsuite=yes
+       ;;
    frv-*-*)
        SIM_ARCH(frv)
        sim_testsuite=yes
Index: common/gennltvals.sh
===================================================================
RCS file: /cvs/src/src/sim/common/gennltvals.sh,v
retrieving revision 1.7
diff -p -u -r1.7 gennltvals.sh
--- common/gennltvals.sh	21 Mar 2011 22:06:55 -0000	1.7
+++ common/gennltvals.sh	27 Jan 2012 23:03:36 -0000
@@ -45,6 +45,10 @@ dir=libgloss target=cr16
 $shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \
 	"syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}"
 
+dir=libgloss target=epiphany
+$shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \
+	"syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}"
+
 dir=libgloss target=fr30
 $shell ${srccom}/gentvals.sh $target sys ${srcroot}/$dir \
 	"syscall.h" 'SYS_[_A-Za-z0-9]*' "${cpp}"
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