[PATCH] MIPS: Correct floating point condition code mask

Maciej W. Rozycki macro@codesourcery.com
Wed Dec 7 00:18:00 GMT 2011


On Mon, 5 Dec 2011, Joel Brobecker wrote:

> >  The floating point condition codes occupy bits 31:25 and 23 of the 
> > Floating Point Control and Status Register (or have done so since the 
> > R8000 and the MIPS IV ISA where codes beyond #0 were added).
> 
> Trusting you again on this one...

 The original MIPS IV ISA definition of the FCSR can be found in Appendix 
B of the MIPS IV spec (007-2597-001.pdf) available from techpubs.sgi.com 
(the spec consists of two appendices only; no idea where the rest is).  
The current version is at mips.com ("Introduction to the MIPS32 
Architecture", doc #MD00082).

> > 2011-11-23  Maciej W. Rozycki  <macro@codesourcery.com>
> > 
> > 	gdb/
> > 	* mips-tdep.c (mips32_next_pc): Fix floating point condition
> > 	code mask.
> 
> ... Based on the above, I agree the patch makes sense. Please go ahead
> and commit.

 I have committed it now, thanks for the review.

  Maciej



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