bug report and patch for smartmips support in gdb

Kiyoshi YAMADA kiyoshi.coquser@gmail.com
Tue Mar 9 08:52:00 GMT 2010


I found 3 bugs on sim for smartmips.
They concern the way the ACX register I handled by 
the instructions MULTU/MULT and MADDU.
This email contains #1 testcases that demonstrate the bugs,
#2 a patch, and #3 additional information about my environment.


##### BEGIN TESTCASES #####

-- MADDU inclements ACX if non-carry --
TEST_MADDU:
	mflhxu	$0		/* ACX|HI|LO >>= 32 */
	mthi	$0		/* HI = 0 */
	mtlo	$0		/* LO = 0 */
	li	$t0, 1		/* T0 = 1 */
	maddu	$t0, $t0	/* ACX|HI|LO += T0 * T0 */
	mflhxu	$0		/* ACX|HI|LO >>= 32 */
CHECKPOINT:
	/* HI == 1 (HI SHOUD BE 0) */

-- MULT break ACX --
TEST_MULT:
        li      $t0, 1          /* T0 = 1 */
        mthi    $t0             /* HI = T0 */
        mtlo    $0              /* LO = 0 */
        mtlhx   $0              /* ACX|HI|LO <<= 32 */
        mult    $t0, $t0        /* HI|LO = T0 * T0 */
        mflhxu  $0              /* ACX|HI|LO >>= 32 */
CHECKPOINT1:
        /* HI == 0 (HI SHOUD BE 1) */

-- MULTU ignore ACX --
TEST_MULTU:
        li      $t0, 1          /* T0 = 1 */
        mthi    $t0             /* HI = T0 */
        mtlo    $0              /* LO = 0 */
        mtlhx   $0              /* ACX|HI|LO <<= 32 */
        multu   $t0, $t0        /* ACX|HI|LO = T0 * T0 */
        mflhxu  $0              /* ACX|HI|LO >>= 32 */
CHECKPOINT2:
        /* HI == 1 (HI SHOUD BE 0) */

##### END TESTCASES #####


I think the following patch fixes these bugs:

##### BEGIN PATCH #####

Index: sim/mips/mips.igen
===================================================================
RCS file: /cvs/src/src/sim/mips/mips.igen,v
retrieving revision 1.68
diff -c -r1.68 mips.igen
*** sim/mips/mips.igen	22 Oct 2007 20:02:25 -0000	1.68
--- sim/mips/mips.igen	16 Feb 2010 06:57:47 -0000
***************
*** 2482,2488 ****
    TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
    temp = (U8_4 (VL4_8 (HI), VL4_8 (LO))
            + ((unsigned64) VL4_8 (GPR[RS]) * (unsigned64) VL4_8 (GPR[RT])));
!   ACX += U8_4 (VL4_8 (HI), VL4_8 (LO)) < temp;  /* SmartMIPS */ 
    LO = EXTEND32 (temp);
    HI = EXTEND32 (VH4_8 (temp));
    TRACE_ALU_RESULT2 (HI, LO);
--- 2482,2488 ----
    TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
    temp = (U8_4 (VL4_8 (HI), VL4_8 (LO))
            + ((unsigned64) VL4_8 (GPR[RS]) * (unsigned64) VL4_8 (GPR[RT])));
!   ACX += U8_4 (VL4_8 (HI), VL4_8 (LO)) > temp;  /* SmartMIPS */ 
    LO = EXTEND32 (temp);
    HI = EXTEND32 (VH4_8 (temp));
    TRACE_ALU_RESULT2 (HI, LO);
***************
*** 2505,2511 ****
    temp = (U8_4 (VL4_8 (DSPHI(AC)), VL4_8 (DSPLO(AC)))
  	  + ((unsigned64) VL4_8 (GPR[RS]) * (unsigned64) VL4_8 (GPR[RT])));
    if (AC == 0)
!     ACX += U8_4 (VL4_8 (HI), VL4_8 (LO)) < temp;  /* SmartMIPS */
    DSPLO(AC) = EXTEND32 (temp);
    DSPHI(AC) = EXTEND32 (VH4_8 (temp));
    if (AC == 0)
--- 2505,2511 ----
    temp = (U8_4 (VL4_8 (DSPHI(AC)), VL4_8 (DSPLO(AC)))
  	  + ((unsigned64) VL4_8 (GPR[RS]) * (unsigned64) VL4_8 (GPR[RT])));
    if (AC == 0)
!     ACX += U8_4 (VL4_8 (HI), VL4_8 (LO)) > temp;  /* SmartMIPS */
    DSPLO(AC) = EXTEND32 (temp);
    DSPHI(AC) = EXTEND32 (VH4_8 (temp));
    if (AC == 0)
***************
*** 2804,2810 ****
  	  * ((signed64)(signed32) GPR[rt]));
    LO = EXTEND32 (VL4_8 (prod));
    HI = EXTEND32 (VH4_8 (prod));
-   ACX = 0;  /* SmartMIPS */
    if (rd != 0)
      GPR[rd] = LO;
    TRACE_ALU_RESULT2 (HI, LO);
--- 2804,2809 ----
***************
*** 2843,2852 ****
    DSPLO(AC) = EXTEND32 (VL4_8 (prod));
    DSPHI(AC) = EXTEND32 (VH4_8 (prod));
    if (AC == 0)
!     {
!       ACX = 0;  /* SmartMIPS */
!       TRACE_ALU_RESULT2 (HI, LO);
!     }
  }
  
  
--- 2842,2848 ----
    DSPLO(AC) = EXTEND32 (VL4_8 (prod));
    DSPHI(AC) = EXTEND32 (VH4_8 (prod));
    if (AC == 0)
!     TRACE_ALU_RESULT2 (HI, LO);
  }
  
  
***************
*** 2871,2876 ****
--- 2867,2873 ----
  	  * ((unsigned64)(unsigned32) GPR[rt]));
    LO = EXTEND32 (VL4_8 (prod));
    HI = EXTEND32 (VH4_8 (prod));
+   ACX = 0;  /* SmartMIPS */
    if (rd != 0)
      GPR[rd] = LO;
    TRACE_ALU_RESULT2 (HI, LO);
***************
*** 2909,2915 ****
    DSPLO(AC) = EXTEND32 (VL4_8 (prod));
    DSPHI(AC) = EXTEND32 (VH4_8 (prod));
    if (AC == 0)
!     TRACE_ALU_RESULT2 (HI, LO);
  }
  
  
--- 2906,2915 ----
    DSPLO(AC) = EXTEND32 (VL4_8 (prod));
    DSPHI(AC) = EXTEND32 (VH4_8 (prod));
    if (AC == 0)
!     {
!       ACX = 0;  /* SmartMIPS */
!       TRACE_ALU_RESULT2 (HI, LO);
!     }
  }
  
##### END PATCH #####


##### ADDITIONAL INFO. #####
$ mips-elf-gdb -v
GNU gdb (GDB) 7.0.1.20100211-cvs
Copyright (C) 2009 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.  Type "show copying"
and "show warranty" for details.
This GDB was configured as "--host=i386-apple-darwin10.2.0 --target=mipsisa32-elf".
For bug reporting instructions, please see:
<http://www.gnu.org/software/gdb/bugs/>.
$



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