[RFC] Add support for Renesas RX architecture
Mon Dec 7 23:20:00 GMT 2009
> Rather, it's that such support was always planned, it just needed
> someone to add it.
For the record, here's the limitations I've found...
* The opcode descriptions are generated by exploding macros to get all
the prefix/operand byte permutations (about 12,000 total). I.e. a
single variable-length opcode is converted into dozens of
fixed-length opcodes. Regenerating takes about an hour, and
maintenance is a nightmare.
* cgen doesn't handle the opcode-vs-decodable bits in m32c very well.
The hash table has nothing left to work with (every bit is an
operand in *some* opcode), so the disassembler takes a noticably
long time starting up, especially given that the exploding macros
create many opcodes to hash.
* The disassembler always reads MAX(opsize) bytes, so the .text
sections have to be padded with NOP bytes to prevent crashes.
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