RFA 1/3: change PPC E500 raw regcache layout

[Jim Blandy]

This is the first of three patches that:
- change the layout of the raw regcache on the PowerPC E500,
- accomodate those changes on the sim, and
- accomodate those changes on native Linux.

These patches aren't independent: they need to be committed as a unit.
They're broken into three separate patches just to make the work a bit
easier to review.  (Or harder.)

Why do we need to change the raw regcache layout, anyway?

The register collect and supply functions, used by the corefile
support, the sim interface, and the libthread_db support, use
regcache_raw_supply and regcache_raw_collect to move register values
around.  As their names suggest, those functions do not go through the
pseudo-register machinery; they must present their data to GDB in raw
register terms.

The E500 was originally a sim-only target.  The sim can provide full
64-bit values for ev registers in a single call, so it is reasonable
to make the ev registers the raw registers, and make the
general-purpose registers pseudo-registers that refer to the lower
halves of the ev registers.

However, the E500 is now also a native target.  Since the gregset_t
datatype, used in corefiles and libthread_db on native E500 Linux,
only provides the lower 32 bits of the GPRS on the E500, we must make
those lower halves separate raw registers, since the supply functions
may not have the values of the upper 32-bit halves available.

These patches, as a group, cause no regressions on:
- powerpc-unknown-linux-gnu (PPC 7450 w/ Altivec)
- powerpc-ibm-aix4.3.3.0
- powerpc-unknown-linux-gnu (PPC E500)
- i686-pc-linux-gnu x powerpc-eabispe (sim)

First patch:

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