[PATCH] Another AMD64 32x64 fix
Mark Kettenis
kettenis@chello.nl
Fri Apr 9 23:24:00 GMT 2004
In the 32-bit cross 64-bit case amd64_supply_fxsave and
amd64_collect_fxsave would incorrectly modify some of the SSE
registers. This patches fixes that,
Committed,
Mark
Index: ChangeLog
from Mark Kettenis <kettenis@gnu.org>
* amd64-tdep.c (amd64_supply_fxsave): Only fiddle with
I387_FISEG_REGNUM and I387_FOSEG_REGNUM in 64-bit mode.
(amd64_collect_fxsave): Likewise.
Index: amd64-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/amd64-tdep.c,v
retrieving revision 1.7
diff -u -p -r1.7 amd64-tdep.c
--- amd64-tdep.c 9 Apr 2004 16:28:50 -0000 1.7
+++ amd64-tdep.c 9 Apr 2004 23:20:38 -0000
@@ -1171,7 +1171,7 @@ amd64_supply_fxsave (struct regcache *re
{
i387_supply_fxsave (regcache, regnum, fxsave);
- if (fxsave)
+ if (fxsave && gdbarch_ptr_bit (get_regcache_arch (regcache)) == 64)
{
const char *regs = fxsave;
@@ -1195,8 +1195,11 @@ amd64_collect_fxsave (const struct regca
i387_collect_fxsave (regcache, regnum, fxsave);
- if (regnum == -1 || regnum == I387_FISEG_REGNUM)
- regcache_raw_collect (regcache, I387_FISEG_REGNUM, regs + 12);
- if (regnum == -1 || regnum == I387_FOSEG_REGNUM)
- regcache_raw_collect (regcache, I387_FOSEG_REGNUM, regs + 20);
+ if (gdbarch_ptr_bit (get_regcache_arch (regcache)) == 64)
+ {
+ if (regnum == -1 || regnum == I387_FISEG_REGNUM)
+ regcache_raw_collect (regcache, I387_FISEG_REGNUM, regs + 12);
+ if (regnum == -1 || regnum == I387_FOSEG_REGNUM)
+ regcache_raw_collect (regcache, I387_FOSEG_REGNUM, regs + 20);
+ }
}
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