[patch] Model Latency of SPR registers

[Dave Brolley]

I've committed the attached patch which:

1) Corrects the range of ACC registers checked for fr400 in 
frv_check_spr_read_access
2) Removes some unused variables from functions is profile-fr500.c
3) Adds the capability to model latency of SPR registers and applies it 
to the *div*, clrg*, clrf*, movsg and movgs insns.

Dave

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