[PATCH] Skip SSE registers if they're not supported

[Mark Kettenis]

While working on multi-arching the i386 a bit further I encountered
the situation where I was debugging (on Linux) a binary that wasn't
recognized as a Linux binary.  Instead it was recognized as a SVR4
binary, and since my current implementation of the SVR4 ABI doesn't
include the SSE registers, GDB choked when the native Linux support
bits tried to access these SSE registers in GDB's register file.

Thinking a bit more about what's happening, I reliased that my Athlon
does support the fxsave instruction while it doesn't have SSE
support.  Therefore I think the attached patch is appropriate.

Checked in.

Mark


Index: ChangeLog
from  Mark Kettenis  <kettenis@gnu.org>

	* i387-tdep.c (i387_supply_fxsave): Skip the SSE registers if
	the're not supported by the current architecture.
	(i387_fill_fxsave): Likewise.

Index: i387-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/i387-tdep.c,v
retrieving revision 1.17
diff -u -p -r1.17 i387-tdep.c
--- i387-tdep.c 11 May 2002 17:22:26 -0000 1.17
+++ i387-tdep.c 12 May 2002 21:14:44 -0000
@@ -1,6 +1,6 @@
 /* Intel 387 floating point stuff.
-   Copyright 1988, 1989, 1991, 1992, 1993, 1994, 1998, 1999, 2000, 2001
-   Free Software Foundation, Inc.
+   Copyright 1988, 1989, 1991, 1992, 1993, 1994, 1998, 1999, 2000,
+   2001, 2002 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
@@ -542,9 +542,12 @@ static int i387_tag (unsigned char *raw)
 void
 i387_supply_fxsave (char *fxsave)
 {
-  int i;
+  int i, last_regnum = MXCSR_REGNUM;
+
+  if (gdbarch_tdep (current_gdbarch)->num_xmm_regs == 0)
+    last_regnum = FOP_REGNUM;
 
-  for (i = FP0_REGNUM; i <= MXCSR_REGNUM; i++)
+  for (i = FP0_REGNUM; i <= last_regnum; i++)
     {
       /* Most of the FPU control registers occupy only 16 bits in
 	 the fxsave area.  Give those a special treatment.  */
@@ -601,9 +604,12 @@ i387_supply_fxsave (char *fxsave)
 void
 i387_fill_fxsave (char *fxsave, int regnum)
 {
-  int i;
+  int i, last_regnum = MXCSR_REGNUM;
+
+  if (gdbarch_tdep (current_gdbarch)->num_xmm_regs == 0)
+    last_regnum = FOP_REGNUM;
 
-  for (i = FP0_REGNUM; i <= MXCSR_REGNUM; i++)
+  for (i = FP0_REGNUM; i <= last_regnum; i++)
     if (regnum == -1 || regnum == i)
       {
 	/* Most of the FPU control registers occupy only 16 bits in