Unreviewed patches

Joern Rennecke joern.rennecke@superh.com
Mon Jul 1 10:10:00 GMT 2002


Elena Zannoni wrote:
> 
> Joern Rennecke writes:
>  > Wed Jun 12 13:20:51 2002  J"orn Rennecke <joern.rennecke@superh.com>
>  >
>  > include/gdb:
>  >         * sim-sh.h: Add enum constants for sh[1-4], sh3e, sh3?-dsp.
> 
> Yes, sorry for the delay.
> 
> Is there any real reason to not just have one enum, which included the
> dsp registers as well?

Yes.  The values are supposed to stay the same, to retain compatibility.
Besides, you would need to re-design parts of the simulator to remove
the overlaps.

> 	                 I mean, if the simulator didn't reuse register
> numbers for FP regs and DPS regs, then you could get rid of this ugly
> code in interp.c:
> 
>     else case 44:
>       if (target_dsp)
>         RE = val;
>     else case 45: case 46: case 47: case 48: case 49: case 50:
> [...]
>     case 26:
>       val = target_dsp ? A0 : FI (1);
>       break;
> [...]
> etc. etc.
> 
> And with that you could get rid of the target_dsp variable.

Definitely not.  The same 0xfxxx opcodes mean different things to sh3-dsp
and sh3e.
Using the same register number for fpscr and dsr is natural, since the same
opcodes are used to load/store dsr on sh3-dsp and fpscr on sh3e.

> I think the changes below depend on the cgen patches being accepted first.

They have.
	
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