[binutils-gdb] sim: mips: Only truncate sign extension bits for 32-bit target models

[Faraz Shahbazker]

https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=b312488f1046a1b837561a4adf4323e29377cf12

commit b312488f1046a1b837561a4adf4323e29377cf12
Author: Faraz Shahbazker <fshahbazker@wavecomp.com>
Date:   Wed May 5 04:51:16 2021 +0530

    sim: mips: Only truncate sign extension bits for 32-bit target models
    
    64-bit BFD for MIPS applies a standard sign extension on all addresses
    assuming 64-bit target.  These bits are required for 64-bit and can only
    be safely truncated for 32-bit target models. This partially reverts commit
    b36d953bced0a4fecdde1823abac70ed7038ee95
    
    The sign-extension logic modeled by BFD is an integral part of the
    MIPS64 architecture spec. It appears in the virtual address map, where
    sign extension allows for 32-bit compatibility segments [1] with 64-bit
    addressing. Truncating these addresses prematurely (commit
    models (-DWITH_TARGET_WORD_BITSIZE=64).
    
    In the ISA itself, direct addressing (Load-Upper-Immediate) and indirect
    addressing (Load-Word) both automatically sign-extend their results. These
    instructions regenerate the sign-extended addresses even if we don't start
    with one (see pr gdb/19447).
    
    Moreover, some instructions like ADD*/SUB* have unpredictable behaviour when
    an operand is not correctly sign extended [3]. This affects PC-relative
    addressing in particular, so arithmetic on the link-address generated in the
    return address register by a jump-and-link is no longer possible, neither is
    the use of the PC-relative addressing instructions provided by MIPSR6.
    
    [1] "MIPS64 Architecture for Programmers Volume III: The MIPS64
        Privileged Resource Architecture", Document Number: MD00091,
        Revision 6.02, December 10, 2015, Section 4.3 "Virtual Address
        Spaces", pp. 29-31
    https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00091-2B-MIPS64PRA-AFP-06.03.pdf
    
    [2] "MIPS64 Architecture for Programmers Volume II-A: The MIPS64
        Instruction Set Reference Manual", Document Number: MD00087,
        Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical
        List of Instructions", pp. 321
    https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf
    
    [3] "MIPS64 Architecture for Programmers Volume II-A: The MIPS64
        Instruction Set Reference Manual", Document Number: MD00087,
        Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical
        List of Instructions", pp. 56
    https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf
    
    2021-04-23  Faraz Shahbazker  <fshahbazker@wavecomp.com>
    
    sim/mips/ChangeLog:
            * interp.c (sim_create_inferior): Only truncate sign extension
            bits for 32-bit target models
    .

Diff:
---
 sim/mips/ChangeLog |  6 ++++++
 sim/mips/interp.c  | 11 +++++------
 2 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 85ce1ac8c4f..123d722bdb5 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,9 @@
+2021-05-22  Faraz Shahbazker  <fshahbazker@wavecomp.com>
+
+sim/mips/ChangeLog:
+	* interp.c (sim_create_inferior): Only truncate sign extension
+	bits for 32-bit target models.
+
 2021-05-17  Mike Frysinger  <vapier@gentoo.org>
 
 	* sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
diff --git a/sim/mips/interp.c b/sim/mips/interp.c
index 2839715959c..6e00fd0dbf0 100644
--- a/sim/mips/interp.c
+++ b/sim/mips/interp.c
@@ -1014,12 +1014,11 @@ sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
 	  sim_cpu *cpu = STATE_CPU (sd, cpu_nr);
 	  sim_cia pc = bfd_get_start_address (abfd);
 
-	  /* We need to undo brain-dead bfd behavior where it sign-extends
-	     addresses that are supposed to be unsigned.  See the mips bfd
-	     sign_extend_vma setting.  We have to check the ELF data itself
-	     in order to handle o32 & n32 ABIs.  */
-	  if (abfd->tdata.elf_obj_data->elf_header->e_ident[EI_CLASS] ==
-	      ELFCLASS32)
+	  /* The 64-bit BFD sign-extends MIPS addresses to model
+	     32-bit compatibility segments with 64-bit addressing.
+	     These addresses work as is on 64-bit targets but
+	     can be truncated for 32-bit targets.  */
+	  if (WITH_TARGET_WORD_BITSIZE == 32)
 	    pc = (unsigned32) pc;
 
 	  CPU_PC_SET (cpu, pc);