src/sim/bfin ChangeLog bfin-sim.c

[vapier@sourceware.org]

CVSROOT:	/cvs/src
Module name:	src
Changes by:	vapier@sourceware.org	2011-03-15 20:08:27

Modified files:
	sim/bfin       : ChangeLog bfin-sim.c 

Log message:
	sim: bfin: decode ASTAT on failure
	
	When testing ASTAT regs, specific bit differences carry a lot more meaning
	than when checking the value of a data register.  So automatically decode
	the bits of the two values and print things out so that people don't have
	to manually do it themselves every time.
	
	Signed-off-by: Robin Getz <robin.getz@analog.com>
	Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/ChangeLog.diff?cvsroot=src&r1=1.2&r2=1.3
http://sourceware.org/cgi-bin/cvsweb.cgi/src/sim/bfin/bfin-sim.c.diff?cvsroot=src&r1=1.2&r2=1.3