src/sim ChangeLog cris/arch.c cris/arch.h cris ...

[devans@sourceware.org]

CVSROOT:	/cvs/src
Module name:	src
Changes by:	devans@sourceware.org	2009-10-24 04:33:41

Modified files:
	sim            : ChangeLog 
	sim/cris       : arch.c arch.h cpuall.h cpuv10.c cpuv10.h 
	                 cpuv32.c cpuv32.h cris-desc.c cris-desc.h 
	                 cris-opc.h decodev10.c decodev10.h decodev32.c 
	                 decodev32.h modelv10.c modelv32.c 
	                 semcrisv10f-switch.c semcrisv32f-switch.c 

Log message:
	* cris/arch.c: Regenerate.
	* cris/arch.h: Regenerate.
	* cris/cpuall.h: Regenerate.
	* cris/cpuv10.c: Regenerate.
	* cris/cpuv10.h: Regenerate.
	* cris/cpuv32.c: Regenerate.
	* cris/cpuv32.h: Regenerate.
	* cris/cris-desc.c: Regenerate.
	* cris/cris-desc.h: Regenerate.
	* cris/cris-opc.h: Regenerate.
	* cris/decodev10.c: Regenerate.
	* cris/decodev10.h: Regenerate.
	* cris/decodev32.c: Regenerate.
	* cris/decodev32.h: Regenerate.
	* cris/modelv10.c: Regenerate.
	* cris/modelv32.c: Regenerate.
	* cris/semcrisv10f-switch.c: Regenerate.
	* cris/semcrisv32f-switch.c: Regenerate.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/ChangeLog.diff?cvsroot=src&r1=1.131&r2=1.132
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/arch.c.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/arch.h.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/cpuall.h.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/cpuv10.c.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/cpuv10.h.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/cpuv32.c.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/cpuv32.h.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/cris-desc.c.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/cris-desc.h.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/cris-opc.h.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/decodev10.c.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/decodev10.h.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/decodev32.c.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/decodev32.h.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/modelv10.c.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/modelv32.c.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/semcrisv10f-switch.c.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/cris/semcrisv32f-switch.c.diff?cvsroot=src&r1=1.7&r2=1.8