src/sim common/ChangeLog common/Make-common.in ...

[bje@sourceware.cygnus.com]

CVSROOT:	/cvs/src
Module name:	src
Changes by:	bje@sources.redhat.com	2001-07-05 06:51:26

Modified files:
	sim/common     : ChangeLog Make-common.in 
	sim/fr30       : ChangeLog Makefile.in 
	sim/i960       : ChangeLog Makefile.in 
	sim/m32r       : ChangeLog Makefile.in 

Log message:
	2001-07-05  Ben Elliston  <bje@redhat.com>
	
	* Make-common.in (srccgen): Remove.
	(CGEN_CPU_DIR): Define.
	(CGEN_READ_SCM): Redefine without $(srccgen).
	(CGEN_ARCH_SCM): Ditto.
	(CGEN_CPU_SCM): Ditto.
	(CGEN_DECODE_SCM): Ditto.
	(CGEN_DESC_SCM): Ditto.
	
	* $arch/Makefile.in: Use $(CGEN_CPU_DIR) where applicable.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/common/ChangeLog.diff?cvsroot=src&r1=1.56&r2=1.57
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/common/Make-common.in.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/fr30/ChangeLog.diff?cvsroot=src&r1=1.9&r2=1.10
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/fr30/Makefile.in.diff?cvsroot=src&r1=1.3&r2=1.4
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/i960/ChangeLog.diff?cvsroot=src&r1=1.7&r2=1.8
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/i960/Makefile.in.diff?cvsroot=src&r1=1.3&r2=1.4
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m32r/ChangeLog.diff?cvsroot=src&r1=1.9&r2=1.10
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/m32r/Makefile.in.diff?cvsroot=src&r1=1.4&r2=1.5