[PATCH] nvptx: Add support for subword compare-and-swap

[Kwok Cheung Yeung]

On 01/07/2020 3:28 pm, Tom de Vries wrote:
> I looked at the implementation, and it looks ok to me, though I think we
> need to make explicit in a comment what the assumptions are:
> - that we have read and write access to the entire word, and

Is there a situation where an 8/16-bit portion of memory is R/W but the 32-bit 
word containing it is not on this architecture? Something like memory-mapped I/O 
perhaps?

> - that the word is not volatile.

I don't think that non-volatility matters in this case - indeed, the whole point 
of using an atomic primitive is that the memory being accessed can change at any 
time :-). There is an initial read of the word before the loop, then one read 
per iteration of the loop using __sync_val_compare_and_swap_4 (which by 
definition will always access the memory). If any part of the initially read 
value changes by the time it gets to __sync_val_compare_and_swap_4, then the 
compare will fail and the loop will continue onto the next iteration.

Thanks

Kwok