RFC: PATCH: Remove 26 element limit in vector
Kenneth Zadeck
zadeck@naturalbridge.com
Thu Mar 31 12:14:00 GMT 2011
we hit this limit trying to write the explicit semantics for a
vec_interleave_evenv32qi.
;;(define_insn "vec_interleave_evenv32qi"
;; [(set (match_operand:V32QI 0 "register_operand" "=r")
;; (vec_select:V32QI
;; (vec_concat:V64QI
;; (match_operand:V32QI 1 "register_operand" "0")
;; (match_operand:V32QI 2 "register_operand" "r"))
;; (parallel [(const_int 0) (const_int 32)
;; (const_int 2) (const_int 34)
;; (const_int 4) (const_int 36)
;; (const_int 6) (const_int 38)
;; (const_int 8) (const_int 40)
;; (const_int 10) (const_int 42)
;; (const_int 12) (const_int 44)
;; (const_int 14) (const_int 46)
;; (const_int 16) (const_int 48)
;; (const_int 18) (const_int 50)
;; (const_int 20) (const_int 52)
;; (const_int 22) (const_int 54)
;; (const_int 24) (const_int 56)
;; (const_int 26) (const_int 58)
;; (const_int 28) (const_int 60)
;; (const_int 30) (const_int 62)])))]
;; ""
;; "rimihv\t%0,%2,8,15,8"
;; [(set_attr "type" "rimi")])
kenny
On 03/31/2011 06:16 AM, Mike Stump wrote:
> On Mar 31, 2011, at 1:41 AM, Richard Guenther wrote:
>> On Wed, Mar 30, 2011 at 8:09 PM, H.J. Lu<hongjiu.lu@intel.com> wrote:
>>> On Wed, Mar 30, 2011 at 08:02:38AM -0700, H.J. Lu wrote:
>>>> Hi,
>>>>
>>>> Currently, we limit XVECEXP to 26 elements in machine description
>>>> since we use letters 'a' to 'z' to encode them. I don't see any
>>>> reason why we can't go beyond 'z'. This patch removes this restriction.
>>>> Any comments?
>>>>
>>> That was wrong. The problem is in vector elements. This patch passes
>>> bootstrap. Any comments?
>> Do you really need it?
> I'm trying to recall if this is the limit Kenny and I hit.... If so, annoying. Kenny could confirm if it was. gcc's general strategy of, no fixed N gives gcc a certain flexibility that is very nice to have, on those general grounds, I kinda liked this patch.
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