[patch, ARM] Fix PR46934, Thumb-1 ICE

[Chung-Lin Tang]

Hi, in the ARM "casesi" expand pattern, when the table base index
constant is 0x8000000, it is stored sign extended as an rtx (const_int
0xffffffff8000000) (assuming 64-bit HOST_WIDE_INT).

Subtraction by adding GEN_INT(-INTVAL(operands[1])) then creates
(const_int 0x80000000), which is not sign-extended, and fails to match
the nonmemory_operand predicate later, causing a extract_insn failure
ICE.  So the fix is to use gen_int_mode() instead of GEN_INT, which does
the needed sign-extension.

Cross-tested on QEMU without regressions, okay for trunk?

Thanks,
Chung-Lin
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