[PATCH][i386] Implement ix86_emit_swdivsf more efficiently

Michael Matz matz@suse.de
Thu Mar 17 14:36:00 GMT 2011


Hi,

On Mon, 14 Mar 2011, Richard Guenther wrote:

> This rewrites the iteration step of swdivsf to be more register 
> efficient (two registers instead of four, no load of a FP constant). 
> This matches how ICC emits the rcp sequence and causes no overall loss 
> of precision (Micha might still remember the exact details).

I haven't done a full error analysis for the intermediate rounding steps, 
but merely a statistical analysis for a subset of dividends and the full 
set of divisors.  On AMD and Intel processors (that matters because rcpss 
accuracy is different on both) the sum of all absolute errors between the 
quotient as from divss and the quotients from either our old and the new 
method is better for the new method.  The max error is 2ulps in each case.


Ciao,
Michael.



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