[SCM] master: Correct some x8664 FXSAVE register sizes.

[pmuldoon@sourceware.org]

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- Log -----------------------------------------------------------------
commit c6df012a11ded1aea17d10a8b20484a054ec95f4
Author: Phil Muldoon <pmuldoon@redhat.com>
Date:   Thu Jan 3 18:59:35 2008 +0000

    Correct some x8664 FXSAVE register sizes.
    
    2008-01-03  Phil Muldoon  <pmuldoon@redhat.com>
    
    	* LinuxX8664RegisterBanks.java: (FPREGS) Make RDP and RIP 8 bytes big,
    	and MXCSR, and MXCSR_BLANK 4 bytes big.

-----------------------------------------------------------------------

Summary of changes:
 frysk-core/frysk/bank/ChangeLog                    |    3 +++
 frysk-core/frysk/bank/LinuxX8664RegisterBanks.java |    8 ++++----
 2 files changed, 7 insertions(+), 4 deletions(-)

First 500 lines of diff:
diff --git a/frysk-core/frysk/bank/ChangeLog b/frysk-core/frysk/bank/ChangeLog
index d23ff81..eafaba4 100644
--- a/frysk-core/frysk/bank/ChangeLog
+++ b/frysk-core/frysk/bank/ChangeLog
@@ -1,5 +1,8 @@
 2008-01-03  Phil Muldoon  <pmuldoon@redhat.com>
 
+	* LinuxX8664RegisterBanks.java: (FPREGS) Make RDP and RIP 8 bytes big,
+	and MXCSR, and MXCSR_BLANK 4 bytes big.
+	
 	* LinuxIA32RegisterBanks.java (FPREGS): Made X87Register.DP offset
 	14 instead of 18.
 	* BankRegister.java (access): Add write condition logic.
diff --git a/frysk-core/frysk/bank/LinuxX8664RegisterBanks.java b/frysk-core/frysk/bank/LinuxX8664RegisterBanks.java
index e566087..57eceda 100644
--- a/frysk-core/frysk/bank/LinuxX8664RegisterBanks.java
+++ b/frysk-core/frysk/bank/LinuxX8664RegisterBanks.java
@@ -82,10 +82,10 @@ public class LinuxX8664RegisterBanks {
 	.add(new BankRegister(0x02, 2, X87Registers.FSW))
 	.add(new BankRegister(0x04, 1, X87Registers.FTW))
 	.add(new BankRegister(0x06, 2, X87Registers.FOP))
-	.add(new BankRegister(0x08, 4, X87Registers.RIP))
-	.add(new BankRegister(0x10, 4, X87Registers.RDP))
-	.add(new BankRegister(0x18, 2, X87Registers.MXCSR))
-	.add(new BankRegister(0x1c, 2, X87Registers.MXCSR_MASK))
+	.add(new BankRegister(0x08, 8, X87Registers.RIP))
+	.add(new BankRegister(0x10, 8, X87Registers.RDP))
+	.add(new BankRegister(0x18, 4, X87Registers.MXCSR))
+	.add(new BankRegister(0x1c, 4, X87Registers.MXCSR_MASK))
 	.add(new BankRegister(0x20, 10, X87Registers.ST0))
 	.add(new BankRegister(0x30, 10, X87Registers.ST1))
 	.add(new BankRegister(0x40, 10, X87Registers.ST2))


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