[SCM] master: Use X8664Registers.DR0..DR7; eliminate "d6".
cagney@sourceware.org
cagney@sourceware.org
Wed Nov 21 20:28:00 GMT 2007
The branch, master has been updated
via 04406050f6a4910464c1dd4756121123c9a3708b (commit)
from b1e11394a6989b141abfb1c708d3c0566bfb5847 (commit)
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- Log -----------------------------------------------------------------
commit 04406050f6a4910464c1dd4756121123c9a3708b
Author: Andrew Cagney <cagney@toil.yyz.redhat.com>
Date: Wed Nov 21 15:25:20 2007 -0500
Use X8664Registers.DR0..DR7; eliminate "d6".
frysk-core/frysk/proc/ChangeLog
2007-11-21 Andrew Cagney <cagney@redhat.com>
* IsaX8664.java: Use X8664Registers.DR6 instead of "d6".
* X86BankRegisters.java: Use X8664Registers.DR0 .. DR7.
-----------------------------------------------------------------------
Summary of changes:
frysk-core/frysk/isa/X8664Registers.java | 16 ++++++------
frysk-core/frysk/proc/ChangeLog | 5 ++++
frysk-core/frysk/proc/IsaX8664.java | 6 +---
frysk-core/frysk/proc/X86BankRegisters.java | 32 +++++++++++++-------------
4 files changed, 31 insertions(+), 28 deletions(-)
First 500 lines of diff:
diff --git a/frysk-core/frysk/isa/X8664Registers.java b/frysk-core/frysk/isa/X8664Registers.java
index 29eb635..cdbc06d 100644
--- a/frysk-core/frysk/isa/X8664Registers.java
+++ b/frysk-core/frysk/isa/X8664Registers.java
@@ -141,21 +141,21 @@ public class X8664Registers extends Registers {
= new Register("xmm15", StandardTypes.INT64L_T);
public static final Register DR0
- = new Register("dr0", StandardTypes.INT32L_T);
+ = new Register("dr0", StandardTypes.INT64L_T);
public static final Register DR1
- = new Register("dr1", StandardTypes.INT32L_T);
+ = new Register("dr1", StandardTypes.INT64L_T);
public static final Register DR2
- = new Register("dr2", StandardTypes.INT32L_T);
+ = new Register("dr2", StandardTypes.INT64L_T);
public static final Register DR3
- = new Register("dr3", StandardTypes.INT32L_T);
+ = new Register("dr3", StandardTypes.INT64L_T);
public static final Register DR4
- = new Register("dr4", StandardTypes.INT32L_T);
+ = new Register("dr4", StandardTypes.INT64L_T);
public static final Register DR5
- = new Register("dr5", StandardTypes.INT32L_T);
+ = new Register("dr5", StandardTypes.INT64L_T);
public static final Register DR6
- = new Register("dr6", StandardTypes.INT32L_T);
+ = new Register("dr6", StandardTypes.INT64L_T);
public static final Register DR7
- = new Register("dr7", StandardTypes.INT32L_T);
+ = new Register("dr7", StandardTypes.INT64L_T);
// Magic; on Linux contains EAX (or syscall number) at the start
// of a system call.
diff --git a/frysk-core/frysk/proc/ChangeLog b/frysk-core/frysk/proc/ChangeLog
index a4c2635..ba69afb 100644
--- a/frysk-core/frysk/proc/ChangeLog
+++ b/frysk-core/frysk/proc/ChangeLog
@@ -1,3 +1,8 @@
+2007-11-21 Andrew Cagney <cagney@redhat.com>
+
+ * IsaX8664.java: Use X8664Registers.DR6 instead of "d6".
+ * X86BankRegisters.java: Use X8664Registers.DR0 .. DR7.
+
2007-11-20 Andrew Cagney <cagney@redhat.com>
* X86BankRegisters.java: Use X8664Registers.XMM0 et.al., ORIG_RAX,
diff --git a/frysk-core/frysk/proc/IsaX8664.java b/frysk-core/frysk/proc/IsaX8664.java
index e29be4b..b3f3521 100644
--- a/frysk-core/frysk/proc/IsaX8664.java
+++ b/frysk-core/frysk/proc/IsaX8664.java
@@ -124,11 +124,9 @@ public class IsaX8664 implements Isa
* This resets the stepping flag.
*/
public boolean isTaskStepped(Task task) {
- // FIXME: There's a name screwup - d6 vs dr6.
- BankRegister d6 = task.getRegisterBanks().getBankRegister("d6");
- long value = d6.getFIXME(task);
+ long value = task.getRegister(X8664Registers.DR6);
boolean stepped = (value & 0x4000) != 0;
- d6.putFIXME(task, value & ~0x4000);
+ task.setRegister(X8664Registers.DR6, value & ~0x4000);
return stepped;
}
diff --git a/frysk-core/frysk/proc/X86BankRegisters.java b/frysk-core/frysk/proc/X86BankRegisters.java
index fdb383b..9b6d6e0 100644
--- a/frysk-core/frysk/proc/X86BankRegisters.java
+++ b/frysk-core/frysk/proc/X86BankRegisters.java
@@ -161,14 +161,14 @@ public class X86BankRegisters {
.add(new BankRegister(1, 368, 16, X8664Registers.XMM13))
.add(new BankRegister(1, 384, 16, X8664Registers.XMM14))
.add(new BankRegister(1, 400, 16, X8664Registers.XMM15))
- .add(new BankRegister(2, 848, 8, "d0"))
- .add(new BankRegister(2, 856, 8, "d1"))
- .add(new BankRegister(2, 864, 8, "d2"))
- .add(new BankRegister(2, 872, 8, "d3"))
- .add(new BankRegister(2, 880, 8, "d4"))
- .add(new BankRegister(2, 888, 8, "d5"))
- .add(new BankRegister(2, 896, 8, "d6"))
- .add(new BankRegister(2, 904, 8, "d7"))
+ .add(new BankRegister(2, 848, 8, X8664Registers.DR0))
+ .add(new BankRegister(2, 856, 8, X8664Registers.DR1))
+ .add(new BankRegister(2, 864, 8, X8664Registers.DR2))
+ .add(new BankRegister(2, 872, 8, X8664Registers.DR3))
+ .add(new BankRegister(2, 880, 8, X8664Registers.DR4))
+ .add(new BankRegister(2, 888, 8, X8664Registers.DR5))
+ .add(new BankRegister(2, 896, 8, X8664Registers.DR6))
+ .add(new BankRegister(2, 904, 8, X8664Registers.DR7))
;
public static BankRegisterMap IA32_ON_X8664
@@ -213,13 +213,13 @@ public class X86BankRegisters {
.add("xmm5")
.add("xmm6")
.add("xmm7")
- .add("d0", "d0")
- .add("d1", "d1")
- .add("d2", "d2")
- .add("d3", "d3")
- .add("d4", "d4")
- .add("d5", "d5")
- .add("d6", "d6")
- .add("d7", "d7")
+ .add("d0", "dr0")
+ .add("d1", "dr1")
+ .add("d2", "dr2")
+ .add("d3", "dr3")
+ .add("d4", "dr4")
+ .add("d5", "dr5")
+ .add("d6", "dr6")
+ .add("d7", "dr7")
;
}
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