[SCM] master: Updating proc classes to support Power32/64.
jflavio@sourceware.org
jflavio@sourceware.org
Fri Nov 9 14:57:00 GMT 2007
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- Log -----------------------------------------------------------------
commit b6cf2c808620d180fdcf03ff2e4dc0451768fef4
Author: Jose Flavio Aguilar Paulino <jflavio@br.ibm.com>
Date: Fri Nov 9 11:15:00 2007 -0200
Updating proc classes to support Power32/64.
commit cdf04613ab0ab6467f13024783e426d0e30449f1
Author: Jose Flavio Aguilar Paulino <jflavio@br.ibm.com>
Date: Fri Nov 9 10:35:12 2007 -0200
Fixing Power32 ISA. Patching the registers and creating register groups.
-----------------------------------------------------------------------
Summary of changes:
frysk-core/frysk/isa/ChangeLog | 4 +
frysk-core/frysk/isa/ISA.java | 11 +-
frysk-core/frysk/isa/PPC32Registers.java | 135 ++++++++++++++------
frysk-core/frysk/proc/ChangeLog | 7 +
frysk-core/frysk/proc/IsaPowerPC.java | 21 ++--
frysk-core/frysk/proc/LinuxPPC.java | 3 +-
frysk-core/frysk/proc/PPCBankRegisters.java | 14 +-
frysk-core/frysk/util/ChangeLog | 3 +
frysk-core/frysk/util/LinuxElfCorefileFactory.java | 5 +-
9 files changed, 136 insertions(+), 67 deletions(-)
First 500 lines of diff:
diff --git a/frysk-core/frysk/isa/ChangeLog b/frysk-core/frysk/isa/ChangeLog
index 97ca1d8..671c4d2 100644
--- a/frysk-core/frysk/isa/ChangeLog
+++ b/frysk-core/frysk/isa/ChangeLog
@@ -1,3 +1,7 @@
+2007-11-09 Jose Flavio Aguilar Paulino <jflavio@br.ibm.com>
+ * Fixing Power32 ISA. Patching the registers and creating
+ register group
+
2007-10-17 Andrew Cagney <cagney@redhat.com>
* IA32Registers.java (ST0, ST1, ST2, ST3, ST4, ST5, ST6)
diff --git a/frysk-core/frysk/isa/ISA.java b/frysk-core/frysk/isa/ISA.java
index c79de70..865f14b 100644
--- a/frysk-core/frysk/isa/ISA.java
+++ b/frysk-core/frysk/isa/ISA.java
@@ -1,6 +1,7 @@
// This file is part of the program FRYSK.
//
// Copyright 2007, Red Hat Inc.
+// Copyright (C) 2006-2007 IBM
//
// FRYSK is free software; you can redistribute it and/or modify it
// under the terms of the GNU General Public License as published by
@@ -71,16 +72,16 @@ public final class ISA {
);
}
+ /*
+ * PowerPC is a Bi-Endian archtecture, it supports little and big
+ * endianness. But, usually (99.9%) it is used as a big endian,
+ * in truth in memory the data is stored always in big-endian format
+ */
public static final ISA PPC32BE
= new ISA(ByteOrder.BIG_ENDIAN, 4, "PowerPC");
public static final ISA PPC64BE
= new ISA(ByteOrder.BIG_ENDIAN, 8, "PowerPC");
- public static final ISA PPC32LE
- = new ISA(ByteOrder.LITTLE_ENDIAN, 4, "PowerPC");
- public static final ISA PPC64LE
- = new ISA(ByteOrder.LITTLE_ENDIAN, 8, "PowerPC");
-
public static final ISA IA32
= new ISA(ByteOrder.LITTLE_ENDIAN, 4, "IA32");
public static final ISA X8664
diff --git a/frysk-core/frysk/isa/PPC32Registers.java b/frysk-core/frysk/isa/PPC32Registers.java
index bbe4805..8387e61 100644
--- a/frysk-core/frysk/isa/PPC32Registers.java
+++ b/frysk-core/frysk/isa/PPC32Registers.java
@@ -1,6 +1,10 @@
// This file is part of the program FRYSK.
//
// Copyright 2007, Red Hat Inc.
+// Copyright (C) 2006-2007 IBM
+//
+// Contributed by
+// Jose Flavio Aguilar Paulino <jflavio@br.ibm.com> <joseflavio@gmail.com>
//
// FRYSK is free software; you can redistribute it and/or modify it
// under the terms of the GNU General Public License as published by
@@ -108,76 +112,128 @@ public class PPC32Registers extends Registers {
public static final Register GPR31
= new Register("gpr31", StandardTypes.INT32B_T);
+ /* Special registers */
+
+ public static final Register CTR
+ = new Register("counterreg", StandardTypes.INT32B_T);
+ public static final Register XER
+ = new Register("fixedstatuscontrolreg", StandardTypes.INT32B_T);
+ public static final Register CCR
+ = new Register("conditionreg", StandardTypes.INT32B_T);
+ public static final Register LR
+ = new Register("linkreg", StandardTypes.VOIDPTR32B_T);
+ public static final Register FPSCR
+ = new Register("floatingstatuscontrolreg", StandardTypes.INT32B_T);
+
public static final Register FPR0
- = new Register("fpr0", StandardTypes.FLOAT64B_T);
+ = new Register("fpr0", StandardTypes.FLOAT64B_T);
public static final Register FPR1
- = new Register("fpr1", StandardTypes.FLOAT64B_T);
+ = new Register("fpr1", StandardTypes.FLOAT64B_T);
public static final Register FPR2
- = new Register("fpr2", StandardTypes.FLOAT64B_T);
+ = new Register("fpr2", StandardTypes.FLOAT64B_T);
public static final Register FPR3
- = new Register("fpr3", StandardTypes.FLOAT64B_T);
+ = new Register("fpr3", StandardTypes.FLOAT64B_T);
public static final Register FPR4
- = new Register("fpr4", StandardTypes.FLOAT64B_T);
+ = new Register("fpr4", StandardTypes.FLOAT64B_T);
public static final Register FPR5
- = new Register("fpr5", StandardTypes.FLOAT64B_T);
+ = new Register("fpr5", StandardTypes.FLOAT64B_T);
public static final Register FPR6
- = new Register("fpr6", StandardTypes.FLOAT64B_T);
+ = new Register("fpr6", StandardTypes.FLOAT64B_T);
public static final Register FPR7
- = new Register("fpr7", StandardTypes.FLOAT64B_T);
+ = new Register("fpr7", StandardTypes.FLOAT64B_T);
public static final Register FPR8
- = new Register("fpr8", StandardTypes.FLOAT64B_T);
+ = new Register("fpr8", StandardTypes.FLOAT64B_T);
public static final Register FPR9
- = new Register("fpr9", StandardTypes.FLOAT64B_T);
+ = new Register("fpr9", StandardTypes.FLOAT64B_T);
public static final Register FPR10
- = new Register("fpr10", StandardTypes.FLOAT64B_T);
+ = new Register("fpr10", StandardTypes.FLOAT64B_T);
public static final Register FPR11
- = new Register("fpr11", StandardTypes.FLOAT64B_T);
+ = new Register("fpr11", StandardTypes.FLOAT64B_T);
public static final Register FPR12
- = new Register("fpr12", StandardTypes.FLOAT64B_T);
+ = new Register("fpr12", StandardTypes.FLOAT64B_T);
public static final Register FPR13
- = new Register("fpr13", StandardTypes.FLOAT64B_T);
+ = new Register("fpr13", StandardTypes.FLOAT64B_T);
public static final Register FPR14
- = new Register("fpr14", StandardTypes.FLOAT64B_T);
+ = new Register("fpr14", StandardTypes.FLOAT64B_T);
public static final Register FPR15
- = new Register("fpr15", StandardTypes.FLOAT64B_T);
+ = new Register("fpr15", StandardTypes.FLOAT64B_T);
public static final Register FPR16
- = new Register("fpr16", StandardTypes.FLOAT64B_T);
+ = new Register("fpr16", StandardTypes.FLOAT64B_T);
public static final Register FPR17
- = new Register("fpr17", StandardTypes.FLOAT64B_T);
+ = new Register("fpr17", StandardTypes.FLOAT64B_T);
public static final Register FPR18
- = new Register("fpr18", StandardTypes.FLOAT64B_T);
+ = new Register("fpr18", StandardTypes.FLOAT64B_T);
public static final Register FPR19
- = new Register("fpr19", StandardTypes.FLOAT64B_T);
+ = new Register("fpr19", StandardTypes.FLOAT64B_T);
public static final Register FPR20
- = new Register("fpr20", StandardTypes.FLOAT64B_T);
+ = new Register("fpr20", StandardTypes.FLOAT64B_T);
public static final Register FPR21
- = new Register("fpr21", StandardTypes.FLOAT64B_T);
+ = new Register("fpr21", StandardTypes.FLOAT64B_T);
public static final Register FPR22
- = new Register("fpr22", StandardTypes.FLOAT64B_T);
+ = new Register("fpr22", StandardTypes.FLOAT64B_T);
public static final Register FPR23
- = new Register("fpr23", StandardTypes.FLOAT64B_T);
+ = new Register("fpr23", StandardTypes.FLOAT64B_T);
public static final Register FPR24
- = new Register("fpr24", StandardTypes.FLOAT64B_T);
+ = new Register("fpr24", StandardTypes.FLOAT64B_T);
public static final Register FPR25
- = new Register("fpr25", StandardTypes.FLOAT64B_T);
+ = new Register("fpr25", StandardTypes.FLOAT64B_T);
public static final Register FPR26
- = new Register("fpr26", StandardTypes.FLOAT64B_T);
+ = new Register("fpr26", StandardTypes.FLOAT64B_T);
public static final Register FPR27
- = new Register("fpr27", StandardTypes.FLOAT64B_T);
+ = new Register("fpr27", StandardTypes.FLOAT64B_T);
public static final Register FPR28
- = new Register("fpr28", StandardTypes.FLOAT64B_T);
+ = new Register("fpr28", StandardTypes.FLOAT64B_T);
public static final Register FPR29
- = new Register("fpr29", StandardTypes.FLOAT64B_T);
+ = new Register("fpr29", StandardTypes.FLOAT64B_T);
public static final Register FPR30
- = new Register("fpr30", StandardTypes.FLOAT64B_T);
+ = new Register("fpr30", StandardTypes.FLOAT64B_T);
public static final Register FPR31
- = new Register("fpr31", StandardTypes.FLOAT64B_T);
+ = new Register("fpr31", StandardTypes.FLOAT64B_T);
+
+ public static final RegisterGroup GENERAL
+ = new RegisterGroup("general",
+ new Register[] {
+ GPR0 , GPR1 , GPR2 , GPR3 , GPR4 , GPR5 , GPR6 , GPR7 , GPR8 , GPR9 ,
+ GPR10, GPR11, GPR12, GPR13, GPR14, GPR15, GPR16, GPR17, GPR18, GPR19,
+ GPR20, GPR21, GPR22, GPR23, GPR24, GPR25, GPR26, GPR27, GPR28, GPR29,
+ GPR30, GPR31 });
+
+ public static final RegisterGroup SPECIAL
+ = new RegisterGroup("special",
+ new Register[] { CTR, XER, CCR, LR, FPSCR });
+
+ public static final RegisterGroup FLOATING_POINTER
+ = new RegisterGroup("floatingpointer",
+ new Register[] {
+ FPR0 , FPR1 , FPR2 , FPR3 , FPR4 , FPR5 , FPR6 , FPR7 , FPR8 , FPR9 ,
+ FPR10, FPR11, FPR12, FPR13, FPR14, FPR15, FPR16, FPR17, FPR18, FPR19,
+ FPR20, FPR21, FPR22, FPR23, FPR24, FPR25, FPR26, FPR27, FPR28, FPR29,
+ FPR30, FPR31 });
- public static final Register NIP
- = new Register("nip", StandardTypes.VOIDPTR32B_T);
+ public static final RegisterGroup ALL;
+ static {
+ Register[] allRegs = new Register[
+ GENERAL.getRegisters().length +
+ SPECIAL.getRegisters().length +
+ FLOATING_POINTER.getRegisters().length];
+
+ System.arraycopy(GENERAL.getRegisters(), 0,
+ allRegs, 0,
+ GENERAL.getRegisters().length);
+
+ System.arraycopy(SPECIAL.getRegisters(), 0,
+ allRegs, GENERAL.getRegisters().length,
+ SPECIAL.getRegisters().length);
+
+ System.arraycopy(FLOATING_POINTER.getRegisters(), 0,
+ allRegs, GENERAL.getRegisters().length + SPECIAL.getRegisters().length,
+ FLOATING_POINTER.getRegisters().length);
+
+ ALL = new RegisterGroup("all", allRegs);
+ }
public Register getProgramCounter() {
- return NIP;
+ return LR;
}
public Register getStackPointer() {
@@ -185,17 +241,14 @@ public class PPC32Registers extends Registers {
}
public RegisterGroup getDefaultRegisterGroup() {
- // FIXME!
- return null;
+ return GENERAL;
}
public RegisterGroup getAllRegistersGroup() {
- // FIXME!
- return null;
+ return ALL;
}
PPC32Registers() {
- // FIXME!
- super(null);
+ super(new RegisterGroup[] { GENERAL, SPECIAL, FLOATING_POINTER, ALL });
}
}
diff --git a/frysk-core/frysk/proc/ChangeLog b/frysk-core/frysk/proc/ChangeLog
index bf85d82..357707b 100644
--- a/frysk-core/frysk/proc/ChangeLog
+++ b/frysk-core/frysk/proc/ChangeLog
@@ -1,3 +1,10 @@
+2007-11-09 Jose Flavio Aguilar Paulino <jflavio@br.ibm.com>
+
+ * IsaPowerPC.java: Updated it to also support Power32.
+ * LinuxPPC.java: Patched to suppport Power32.
+ * PPCBankRegisters.java: Corrected Power32 and Power 64 register
+ banks, need to be reviewed later.
+
2007-10-31 Petr Machata <pmachata@redhat.com>
* TestTaskObserverCode.java (testMultiTaskUpdateCalledSeveralTimes): New test.
diff --git a/frysk-core/frysk/proc/IsaPowerPC.java b/frysk-core/frysk/proc/IsaPowerPC.java
index 8524381..a9f3998 100644
--- a/frysk-core/frysk/proc/IsaPowerPC.java
+++ b/frysk-core/frysk/proc/IsaPowerPC.java
@@ -49,24 +49,24 @@ import frysk.isa.Register;
import inua.eio.ByteOrder;
abstract class IsaPowerPC implements Isa {
- private final Register NIP;
+ private final Register PC;
- protected IsaPowerPC(Register NIP) {
- this.NIP = NIP;
+ protected IsaPowerPC(Register PC) {
+ this.PC = PC;
}
- // the illegal instruction for powerpc: 0x7d821008.
- // the default order is BIG_ENDIAN
- protected static final Instruction ppcBreakpoint
- = new Instruction(new byte[] { (byte)0x7d, (byte)0x82,
- (byte)0x10, (byte)0x08 }, false);
+ // the illegal instruction for powerpc: 0x7d821008.
+ // the default order is BIG_ENDIAN
+ protected static final Instruction ppcBreakpoint =
+ new Instruction(new byte[] { (byte)0x7d, (byte)0x82,
+ (byte)0x10, (byte)0x08 }, false);
public long pc (Task task) {
- return task.getRegister(NIP);
+ return task.getRegister(PC);
}
public void setPC (Task task, long address) {
- task.setRegister(NIP, address);
+ task.setRegister(PC, address);
}
/**
@@ -110,7 +110,6 @@ abstract class IsaPowerPC implements Isa {
* Get the true breakpoint address according to PC register after hitting
* one breakpoint set in task. In PowerPC, the PC register's value will
* remain unchanged.
- *
*/
public final long getBreakpointAddress(Task task)
{
diff --git a/frysk-core/frysk/proc/LinuxPPC.java b/frysk-core/frysk/proc/LinuxPPC.java
index 027fcf4..9c2a103 100644
--- a/frysk-core/frysk/proc/LinuxPPC.java
+++ b/frysk-core/frysk/proc/LinuxPPC.java
@@ -48,7 +48,8 @@ import frysk.isa.PPC32Registers;
class LinuxPPC extends IsaPowerPC implements SyscallEventDecoder {
LinuxPPC() {
- super(PPC32Registers.NIP);
+ //In Power32 the PC will be in Link Register
+ super(PPC32Registers.LR);
}
private static Logger logger = Logger.getLogger(ProcLogger.LOGGER_ID);
diff --git a/frysk-core/frysk/proc/PPCBankRegisters.java b/frysk-core/frysk/proc/PPCBankRegisters.java
index c1aa73c..22b43a9 100644
--- a/frysk-core/frysk/proc/PPCBankRegisters.java
+++ b/frysk-core/frysk/proc/PPCBankRegisters.java
@@ -79,18 +79,18 @@ public class PPCBankRegisters {
.add(new BankRegister(0, 116, 4, PPC32Registers.GPR29))
.add(new BankRegister(0, 120, 4, PPC32Registers.GPR30))
.add(new BankRegister(0, 124, 4, PPC32Registers.GPR31))
- .add(new BankRegister(0, 128, 4, PPC32Registers.NIP))
+ .add(new BankRegister(0, 128, 4, "result"))
.add(new BankRegister(0, 132, 4, "msr"))
.add(new BankRegister(0, 136, 4, "orig_r3"))
- .add(new BankRegister(0, 140, 4, "ctr"))
- .add(new BankRegister(0, 144, 4, "lnk"))
- .add(new BankRegister(0, 148, 4, "xer"))
- .add(new BankRegister(0, 152, 4, "ccr"))
- .add(new BankRegister(0, 156, 4, "mq"))
+ .add(new BankRegister(0, 140, 4, PPC32Registers.CTR))
+ .add(new BankRegister(0, 144, 4, PPC32Registers.LR))
+ .add(new BankRegister(0, 148, 4, PPC32Registers.XER))
+ .add(new BankRegister(0, 152, 4, PPC32Registers.CCR))
+ .add(new BankRegister(0, 156, 4, PPC32Registers.FPSCR))
.add(new BankRegister(0, 160, 4, "trap"))
.add(new BankRegister(0, 164, 4, "dar"))
.add(new BankRegister(0, 168, 4, "dsisr"))
- .add(new BankRegister(0, 172, 4, "result"))
+ .add(new BankRegister(0, 172, 4, "mq"))
.add(new BankRegister(0, 192, 8, PPC32Registers.FPR0))
.add(new BankRegister(0, 200, 8, PPC32Registers.FPR1))
.add(new BankRegister(0, 208, 8, PPC32Registers.FPR2))
diff --git a/frysk-core/frysk/util/ChangeLog b/frysk-core/frysk/util/ChangeLog
index fe07bf5..d1fc9f9 100644
--- a/frysk-core/frysk/util/ChangeLog
+++ b/frysk-core/frysk/util/ChangeLog
@@ -1,3 +1,6 @@
+2007-11-09 Jose Flavio Aguilar Paulino <jflavio@br.ibm.com>
+ * LinuxElfCorefileFactory.java: Removed Power little endian.
+
2007-10-22 Phil Muldoon <pmuldoon@redhat.com>
* IA32LinuxElfCorefile.java (writeNotePrstatus): Convert
diff --git a/frysk-core/frysk/util/LinuxElfCorefileFactory.java b/frysk-core/frysk/util/LinuxElfCorefileFactory.java
index 7a1879a..f206a85 100644
--- a/frysk-core/frysk/util/LinuxElfCorefileFactory.java
+++ b/frysk-core/frysk/util/LinuxElfCorefileFactory.java
@@ -1,6 +1,7 @@
// This file is part of the program FRYSK.
//
// Copyright 2007, Red Hat Inc.
+// Copyright 2006 IBM Corp.
//
// FRYSK is free software; you can redistribute it and/or modify it
// under the terms of the GNU General Public License as published by
@@ -58,9 +59,9 @@ public class LinuxElfCorefileFactory
return new IA32LinuxElfCorefile(process, blockedTasks);
if (isa.equals(ISA.X8664))
return new X8664LinuxElfCorefile(process, blockedTasks);
- if (isa.equals(ISA.PPC32BE) || isa.equals(ISA.PPC32LE))
+ if (isa.equals(ISA.PPC32BE))
return new PPC32LinuxElfCorefile(process, blockedTasks);
- if (isa.equals(ISA.PPC64BE) || isa.equals(ISA.PPC64LE))
+ if (isa.equals(ISA.PPC64BE))
return new PPC64LinuxElfCorefile(process, blockedTasks);
throw new RuntimeException("Cannot find arch for process PID " + process.getPid());
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