[Bug backends/27925] riscv backend only provides return value locations for code compiled for LP64D ABI

[wilson at gcc dot gnu.org]

https://sourceware.org/bugzilla/show_bug.cgi?id=27925

--- Comment #3 from Jim Wilson <wilson at gcc dot gnu.org> ---
I'm not aware of any supported lp64 linux systems, so I don't know why the
patch is needed, and I am unable to test it.

It does look mostly reasonable.  The riscv_init.c change isn't quite correct as
we have 3 64-bit ABIs.  lp64d is 64-bit FP registers, lp64f is 32-bit FP
registers, and lp64 is no FP registers.  So we actually need a check for the
lp64 ABI instead of assuming that !lp64d is lp64.  Also the "lp64i" should be
"lp64" to be consistent with the ABI naming scheme.

I would suspect other changes are required for full lp64 support. 
riscv_abi_cfi references FP registers unconditionally.  riscv_register_info
references FP registers unconditionally.

The lp64 and lp64f support is incomplete because I've never had access to a
system where I can do the necessary work.  Similarly, the ilp32, ilp32f, and
ilp64d support is also incomplete as I don't have access to any system I can
use to develop them.  All RISC-V linux desktop distros are lp64d.  I think the
linux kernel lacks support for ilp32f and lp64f so those may be impossible to
build at present.  There are some embedded linux distros that use the 32-bit
ABIs, and/or that use soft-float ABIs, but SiFive doesn't support those.  So
I'd have to build an entire linux distro from scratch and boot on qemu to set
up an environment just to do an elfutils port, and I haven't been willing to do
that.

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