[PATCH] RISC-V: Improve riscv64 core file support.

[Mark Wielaard]

On Thu, Dec 27, 2018 at 03:25:49PM -0800, Jim Wilson wrote:
> This fixes two problems.  The offset for x1 is changed from 1 to 8 because this
> is a byte offset not a register skip count.  Support for reading the PC value
> is added.  This requires changing the testsuite to match the new readelf
> output for coredumps.

This commit looks perfect (but please keep the lines a bit smaller, so
git show looks ok on a 80 char term - yeah, I know how old school).
Pushed to master.

Thanks,

Mark